Jobs in Tel Aviv-Yafo

NVIDIA Switches ASIC group is seeking a top-tier ASIC Power technical manager to lead the development of our next-generation ASICs Power execution, modelling, and optimization. Join us in shaping the future of technology! As an ASIC Power Project Lead, you will manage the pre-silicon Power activities of NVIDIA's most advanced and complex switch ASICs. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams. What you’ll be doing: • Lead the ASIC Power execution from architecture stages until tape-out. • Post-Silicon Power Activities: Monitor and support chip Power from power-on and bring-up, quality phases, to mass production. • Power Execution Plans: Define and implement Power execution plans in collaboration with cross-discipline leaders. What we need to see: • BS or MS in Computer or Electrical Engineering or equivalent experience. • 15+ overall years of proven experience in chip design. • 8+ years of experience in VLSI / chip design, leading teams of at least 8 direct reports. • High system view with ability to collaborate with multiple interfaces. • Strong analytical and problem-solving skills. • Excellent communication and teamwork abilities. • Experience in ASIC power optimization, ASIC power modelling, thermal, reliability, Power Integrity, Package and Board design is a plus. If you are creative, autonomous, and love a challenge, we want to hear from you! Join NVIDIA and be a part of the team that is driving the future of technology.

We are seeking for an expert in SOC Design Integration Engineer with strong design fundamentals, to work in Switch Silicon group. You'll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: • Work in a design integration team which responsible for all the switch design integration • Work closely with multiple teams within organizations such as Architecture, u-arch, designers, BackEnd and FW • Work on FullChip Assembly and drive cross-functional teams towards FullChip milestone execution • Be responsible for all the switch chip design architecture focusing on timing, area and power What we need to see: • Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience. • 5+ years of experience in RTL design integration • Experience in synthesis, physical design and DFT is a plus. • Background in RTL Build and Design Automation is a plus. • A team player with good communication and interpersonal skills. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field.

Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and state of the art accelerated compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas. We pioneered a supercharged form of computing loved by the fastest paced computer users in the world - scientists, designers, artists, and gamers. We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect at NVIDIA, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world. What you’ll be doing: • Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments). • Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW. • Developing models for simulations and performance testing, analysing the results and development of future HW and SW. • Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project. What we need to see: • B.Sc, M.Sc, or Ph. D degree in Computer Science, Computer Engineer, or Electrical Engineer. • At least 5 years of industry or research experience in computer networks. • Excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network. • Experience in development of simulation environments. • Possess strong managerial, problem solving and critical thinking skills. • Ability to work and operate in a highly dynamic environment. • Partner with multiple groups in the organization. Ways to stand out of the crowd: • Strong understanding in network protocols - such as InfiniBand, IP, TCP and RoCE and network topologies. • Good knowledge in Python, C++. • Good knowledge with AI models. • Familiarity with HPC environments, routing algorithms, Omnet++ and NS3 simulation environments. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. The GPU Networking Software Architecture team is looking for a Senior Software Architect to help shape software for next-generation AI infrastructure. In this role, you will combine hands-on software architecture and development with system-level thinking. You will collaborate with experienced architects and engineering teams across NVIDIA while expanding your software architecture skills. Join us to help build the technologies that connect and manage large-scale accelerated computing systems. What you’ll be doing: • Contribute to the architecture and prototyping of GPU networking software for large-scale AI infrastructure. • Analyze requirements, evaluate design alternatives, and document technical decisions and trade-offs. • Develop proofs of concept to evaluate interfaces, performance, resiliency, and software-hardware interactions. • Collaborate with GPU, switch, firmware, driver, networking software, product, and architecture teams to move concepts toward implementation. • Build knowledge of the GPU networking software stack and take increasing ownership of well-defined architectural areas. What we need to see: • B.Sc. or M.Sc. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent experience. • 5+ years of relevant software development experience in Linux environments. • Strong understanding of software engineering fundamentals, including debugging, testing, data structures, concurrency, and operating-system concepts. • Solid foundational knowledge of computer networking. • Ability to understand complex systems, reason about component interfaces and design trade-offs, and communicate technical ideas clearly. • Curiosity, initiative, collaborative problem-solving skills, and an eagerness to learn from experienced architects and engineers. • Ability to work effectively with teams across locations and time zones. Ways to stand out from the crowd: • Knowledge in one or more of the following: Ethernet and IP datacenter protocols, management and telemetry protocols, GPU interconnects, Linux kernel or driver development, and network operating systems. • Experience building prototypes or contributing to system-level architecture and design documents. • Familiarity with AI communication libraries or programming models such as NCCL, UCX, MPI, CUDA, or equivalents. • Knowledge of Kubernetes, containers, or cloud-native infrastructure. • Experience analyzing performance, reliability, resiliency, or observability in complex software systems. NVIDIA is widely considered one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you are creative, collaborative, and excited to grow from hands-on software development into software architecture, we want to hear from you.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a Senior RTL Design Engineer to serve as the technical lead for clocks development on our next-generation networking chips. Clocks are the backbone of the SOC. In this role you will lead the development of the chip's clocking logic — PLL and reference clock integration, clock generation, distribution, muxing and dividers, glitchless switching, clock gating, reset synchronization, and the clock domain crossing infrastructure that every unit on the die depends on. This is an RTL design and technical leadership role, not a circuit or transistor-level design role. Working from the clock architecture defined with the architecture and micro-architecture teams, you will lead its implementation in RTL, guide other engineers contributing to it, and drive it through to silicon in close partnership with Design Verification and Physical Design (backend). You will also interact regularly with CAD, Package Design, Software, and DFT teams. What you'll be doing: • Acting as the technical lead for SOC clocks development — leading the implementation of the clocking logic from specification through tape-out and bring-up • Working with the architecture and micro-architecture teams on the SOC clock and reset scheme: collecting clocking requirements from units across the chip, feeding back implementation and timing considerations, and translating the agreed scheme into a verifiable design • Writing and reviewing synthesizable Verilog/SystemVerilog RTL for clock generation, distribution, muxing, division, glitchless switching, gating, and reset synchronization • Leading and mentoring other RTL engineers working on clocking: reviewing designs, setting coding and quality standards, and distributing work across the team • Working hand-in-hand with the Physical Design (backend) team on clock tree implementation, SDC/timing constraints, partitioning, floorplan feedback, trial synthesis, and timing convergence • Partnering with Design Verification on clocking testplans, functional and gate-level debug, and coverage closure • Supporting Software and firmware teams on clock programming sequences, DVFS, and low-power/clock-shutdown flows • Representing clocking implementation in cross-functional design reviews with architecture, PD, DV, DFT, and CAD stakeholders What we need to see: • B.Sc./M.Sc. in Electrical Engineering or Computer Engineering • 8+ years of relevant experience in RTL/logic design, with multiple chips taken to tape-out • Demonstrated technical leadership: leading a design area through implementation and tape-out, mentoring engineers, and coordinating across teams • Expert hands-on RTL design skills in Verilog/SystemVerilog, with strong understanding of how RTL choices affect synthesis results, timing, area, and power • Deep understanding of clocking and reset design: clock gating, clock muxing and dividers, glitchless clock switching, reset synchronization, and clock domain crossing • Proficiency with design quality tooling — lint, CDC/RDC, formal verification, synthesis, and static timing analysis (STA) — including the ability to interpret results and drive fixes back into the RTL • Experience taking a design from architecture and micro-architecture specification through verification, physical implementation, and silicon bring-up • Great teammate with strong communication skills across micro-architecture, DV, backend, DFT, and software teams Ways to stand out from the crowd: • Prior hands-on experience with SOC-level clocking or reset logic on a taped-out chip • Experience with PLL/clock generator integration and clock tree constraint development with backend teams • Experience with high-speed networking, interconnect, or fabric designs • Background with low-power design techniques (clock gating, DVFS, power domains, UPF) • Experience building automation for RTL integration, chip assembly, or design quality flows At NVIDIA, you will be immersed in a diverse and encouraging environment where everyone is encouraged to do their best work. Join us and see how you can make a lasting impact on the world. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA Switches ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development activities of NVIDIA's most advanced and complex switch ASICs. From concept to tape-out and from chip power-on to mass production, you will be the driving force behind the entire lifecycle of our ASIC projects. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams. What you’ll be doing: • Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out. • Post-Silicon Activities; Oversee chip power-on, bring-up, quality phases, and mass production. • Execution Plans; Define and implement execution plans in collaboration with cross-discipline leaders in unit level, full-chip, physical design, and firmware/software emulation. • Roadmap Definition; Contribute to the definition of NVIDIA's switch ASIC roadmap. What we need to see: • BS or MS in Computer or Electrical Engineering or equivalent experience. • 15+ overall years of proven experience in chip design. • 8+ years of experience in chip design/verification management, leading teams of at least 8 direct reports. • Proficiency in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation. • High system view with ability to collaborate with multiple interfaces. • Strong analytical and problem-solving skills. • Excellent communication and teamwork abilities. • Experience in synthesis, and physical design is a plus. If you are creative, autonomous, and love a challenge, we want to hear from you! Join NVIDIA and be a part of the team that is driving the future of technology. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you'll be doing: • Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance. • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems. • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification. • Taking part inflows development. What we need to see: • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience. • 5+ years of relevant experience. • Proven experience in RTL2GDS flows and methodologies. • Knowledge in physical design flows and methodologies (PNR, STA, physical verification). • Deep understanding of all aspects of Physical construction and Integration. • Knowledge in Physical Design Verification methodology LVS/DRC. • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). • Great teammate. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

NVIDIA is looking for best-in-class Physical Design Power Engineer to join our outstanding Networking Silicon Power engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput, lowest latency and best Power! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you will be doing: • Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints. • Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes. • Power estimation and power modeling. What we need to see: • B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering. • 1+ years of experience in physical design and/or BE power optimization aspects. • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). • Native ability to leverage modern AI tools to accelerate engineering workflows, productivity, and problem-solving. • Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage. • FE design experience is an advantage. • Excellent problem-solving, partnership, and interpersonal skills. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

We are hiring a skilled DPU Performance Validation Engineer for our DPU product lines. This includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems. Working in the Network Silicon Engineering group, you will be responsible for debugging, analyzing, and validating performance and functional behavior of current and future NVIDIA silicon devices. You will collaborate with Chip Design, Verification, FW, and Architecture teams to ensure successful product development with bold product cycles. The qualified candidate should be comfortable working in Simulation and Emulation environments, with strong skills in RTL-level debug, waveform analysis, and system-level performance root cause analysis. What you will be doing: • Learn and analyze system-level operation of NVIDIA DPUs • Debug and root-cause performance issues in pre-silicon environments, across RTL, waveform traces, and multi-die system simulations. • Collaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues. • Develop and improve validation methodologies for performance experiments and data collection. • Automate repetitive debug and validation tasks to scale coverage and efficiency. What we need to see: • B.Sc. in Electrical Engineering, Computer Engineering, or equivalent • 3+ years of experience in ASIC development/validation. • Strong background in ASIC debug, including reading RTL, analyzing waveforms, and root-causing functional or performance issues. • Hands-on experience with performance validation and analysis at the system level (die-level or multi-die systems). • Proficiency with Python and C/C++ in a Linux environment. • Excellent interpersonal skills and ability to work optimally as part of a multi-functional team. Ways to stand out from the crowd: • Shown expertise in performance modeling, traffic generation, or architecture studies. • Experience with modern interconnects and protocols (e.g., PCIe, Ethernet, CHI). • Familiarity with emulation platforms (e.g., Palladium, Veloce, FPGA prototyping). • Passion for experimental work, data-driven validation, and creative problem solving. NVIDIA is widely considered to be one of the technology world’s most desirable employers with some of the most forward-thinking, inventive, and hardworking people working here – we need your help to build our future. Are you creative, high-reaching, and love challenges? We want to hear from you!

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you'll be doing: • Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance. • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems. • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification. • Taking part inflows development. What we need to see: • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience. • 1+ years of relevant experience. • Proven experience in RTL2GDS flows and methodologies. • Knowledge in physical design flows and methodologies (PNR, STA, physical verification). • Deep understanding of all aspects of Physical construction and Integration. • Knowledge in Physical Design Verification methodology LVS/DRC. • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). • Great teammate. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

NVIDIA is the engine of modern AI and accelerated computing, and power efficiency sits at the heart of everything we build. We are looking for a Senior ASIC Design Engineer to join our Chip Design team and take ownership of Power Management IP — from micro-architecture definition all the way through to post-silicon enablement. You will be a key player in developing and enabling new technologies that scale across NVIDIA's product lines. If you are passionate about front-end micro-architecture and design and want to see your blocks come to life in silicon, we want to hear from you! What you'll be doing: • Owning the front-end micro-architecture and design of Power Management IP ASIC blocks, from the IP definition phase through the full design cycle and into post-silicon bring-up and enablement. • Serving as a key player in the development and enablement of new power management technologies across NVIDIA's product lines. • Delivering high-quality, synthesizable RTL as part of the IP Chip Design team. • Partnering closely with architecture, verification, physical design, and validation teams to drive successful tape-out and silicon bring-up. • Leading post-silicon debug, characterization, and enablement activities to bring your blocks from concept to working silicon. What we need to see: • BSc or MSc in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience). • 12+ years of hands-on RTL design experience. • Proven experience bringing a block from the development phase all the way through to post-silicon bring-up and enablement. • Strong background in front-end ASIC micro-architecture and design. • Solid command of the full IP/ASIC design flow, from definition through post-silicon. • A collaborative mindset and the drive to be a key contributor within a world-class design team. Ways to stand out from the crowd: • Hands-on experience with Power Management IP. • A track record of contributing to new technology development and enablement. • Deep post-silicon validation and debug expertise. • Familiarity with low-power design techniques and methodologies. NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, disability, or any other characteristic protected by law.

As a chip design Engineer at NVIDIA Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: • Work in a combined design and verification team which develops some of the switch silicon core units • Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to power, area, and performance. • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. What we need to see: • B.Sc. in Electrical/Computer Engineering or equivalent experience. • 5+ years of experience in Verification or RTL design. • Knowledge in network protocols and/or HPC. • A team player with good communication and interpersonal skills.

We are now looking for a best-in-class Chip Design Verification Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at NVIDIA's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays’ semiconductor industry – NVIDIA’s GPU Super-Chip. What you’ll be doing: • Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU • Integrations and Full-Chip models • Verification of chip blocks/entities according to specifications under challenging constraints • Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration What we need to see: • 3+ years of experience in RTL design verification. • B.Sc. in Electrical Engineering or Computer Engineering. • A team player with good communication and interpersonal skills. Ways to stand out from the crowd: • Background in Specman and System-Verilog UVM • Knowledge in Networking NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our team and help us build the future HPC and data centers. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.

NVIDIA is seeking a passionate Senior Software Engineer to join our embedded processing software SDK development team. We are seeking hardworking and experienced engineers to contribute to the development of advanced networking and embedded processing software. You will be part of a team developing next-generation embedded processor SW, working closely with other SW R&D teams and SW Architects. What you will be doing: • Design and develop advanced features for our world-class embedded processing • Write clean, efficient, and maintainable code using advanced AI-based tools • Collaborate with team members, SW R&D, Architects, compiler team, and FW What we need to see: • B.Sc. degree or equivalent experience in Computer Science / Software Engineering • 5+ years of experience • Proficient knowledge and experience in C for an embedded environment • Strong design, coding, analytical, debugging, and problem-solving skills • Full ownership & end-to-end responsibility • Excellent social and written communication skills Ways To Stand Out From The Crowd: • Can do attitude, independency and agility • Ability to quickly adapt to new technology and go deep into new areas • Knowledge of embedded processing, especially with the RISC-V processor, is an advantage • Knowledge of Linux kernel and driver development is an advantage NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASC’s that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry. NVIDIA's networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware circuitry and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities. What you will be doing: • Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design. • Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles. • Define the architecture of implementing physical layer standards into NVIDIA's ASIC devices. • Involved in standard bodies activities and definition of next generation protocols. • Define features for the phy layer, to exploit interoperability between different generations of communication. • Be involved in product definition and the high-speed protocols that the NVIDIA networking devices will support. • Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions. • Become focal point for NVIDIA’s physical layer networking communication devices. What we need to see: • BS or MS degree in EE • 3+ years of experience in the following fields: Physical layer communication / System / Signal Integrity / high speed communication protocols. • Excellent problem solving, teamwork, and interpersonal skills, • Background in embedded software • Experience in networking • Experience in Wire Line Physical layer protocols like IEEE 802.3, InfiniBand, PCIe, USB, etc. • Communication skills, analytical abilities, technically hands-on. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided a reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request an accommodation.

NVIDIA’s Performance Group is seeking a technical NIC & DPU Performance Research & Analysis Engineer to drive end-to-end performance strategy, characterization, optimization and HW offload accelerations for next-generation network interfaces and Data Processing Units (DPUs). In this role, you will analyze and accelerate critical networking and storage technologies and protocols powering multi nodes AI clusters. You will profile performance across the complete hardware-to-software execution stack—stretching from DPU Arm CPU subsystems and PCIe to high-speed RDMA, SPDK, and DOCA acceleration pipelines. What You’ll Be Doing: • Data-Path Optimization: Drive end-to-end benchmark plans, performance characterization, expectations and optimizations for NICs and DPUs deployed in distributed AI and cloud data centers. • Full-Stack Profiling: Profile low-level memory, PCIe, host CPU, and DPU ASIC execution paths to identify micro-architectural stragglers, queue bottlenecks, and tail-latency outliers. • Storage & Network Acceleration: Hands-on acceleration and offloading of storage (SPDK, NVMe-oF, VirtIO) and networking protocols (RDMA/RoCEv2, TCP/IP, DOCA). • AI-Assisted Workflow Automation: Leverage AI agents, autonomous scripts, and automated regression frameworks to scale continuous performance evaluation. • Cross-Functional RCA: Partner closely with Architecture, ASIC, Firmware, and Software engineering groups to conduct rigorous Root Cause Analysis (RCA) and establish performance targets for upcoming pre- and post-silicon platforms. What We Need to See: • B.Sc. or M.Sc. in Computer Science, Computer/Electrical Engineering, Software Engineering, or equivalent practical experience. • 5+ years of experience in low-level networking, storage acceleration, and systems-level performance tuning in cloud or HPC environments. • Direct hands-on experience with at least two of the following: DOCA, SPDK, VirtIO, RDMA/RoCEv2, TCP/IP. • Strong programming proficiency in C, Python, and Linux shell scripting (Bash). • Micro-architectural understanding of modern CPU/ASIC memory hierarchies, PCIe Gen 5/6 interconnects, and Linux kernel networking stacks. • Proven track record using AI coding agents or automated script generators to streamline daily engineering workflows. Ways to Stand Out from the crowd: • Deep hands-on experience tuning NVIDIA BlueField DPUs, ConnectX SmartNICs, or custom hardware offload engines. • Mastery of the full SPDK & NVMe-oF (NVMe over Fabrics) storage stack over high-speed RDMA transport layers. • Comprehensive system-level understanding across x86 (Intel/AMD) and Arm architectures, PCIe topology, and GPUDirect Storage (GDS). • Proven experience isolating stragglers and tail latency in multi-tenant, cloud-scale environments.

NVIDIA Networking team is looking for an outstanding candidate who thrives in a multifaceted environment, to facilitate managing SW Releases for our leading SW products by taking responsibility for cross projects activities. In addition, ensure releases are delivered on time and in high quality, coordinate between development and testing groups and between global SW groups. The role will require to gain good understanding of products’ dependencies. What you’ll be doing: • Be an effective leader in crafting and driving a delivery of high quality SW in an efficient way. • Collaborate with Engineering, Operations, Architecture and Marketing across the globe to coordinate the release of products and ensure release will meet the schedule and with high quality. In parallel, partner with the QA teams to ensure alignment of all tests between the development, verification and QA groups. • Take full ownership of projects from kickoff to signoff. • Manage multiple parallel releases with strong attention to detail, ensuring clarity, alignment, and consistent communication across teams while tracking dependencies, milestones, and deliverables. • Maintain clear, up-to-date visibility of the release status, ensuring all stakeholders have an accurate understanding of progress, next steps, priorities, and risks at any given time. • Support Senior Release Managers with release activities. • Own and manage selected cross-products topics (e.g., customer bugs, release checklists, RCAs, Triage, define and improve processes). • Conduct release meetings and communicate release status. Resolve issues when they appear and raise red flags when needed. Work with planning and tracking systems to lead the release progress, and build release indicators. What we need to see: • Bachelor's or Master’s degree or equivalent experience in Computer Science or industrial Engineering with technical experience. • 3+ years of proven experience as a Release manager or SW project leadership. • Great interpersonal skills. • Agility with multi-tasking abilities and work in an independent and organized way. • Excellent problem-solving, analytical thinking and critical thinking abilities. • Ability to self-manage, self-start, lead technically and communicate effectively. • Excellent presentation skills and eloquent English. Public speaking required. • Experience in leading global projects. • Proficiency with tools such as MS Excel, Atlassian Confluence, enterprise ticket system e.g. Redmine, Jira, TFS. Ways to stand out from the crowd: • Proficiency with BI tools e.g. MS PowerBI • Good technical knowhow and familiarity with Networking and Cloud technologies • Experience with Agile software development methodology and practices • Linux OS technologies knowledge • Github knowledge

NVIDIA is looking for a passionate Senior Software Engineer to join our Simulation development team. Our team is growing, and we are looking for hardworking and experienced engineers to take part in building advanced networking simulation solutions. You will be part of a team developing next generation NIC and Switch simulation, works closely with other SW R&D teams and SW Architects. What you will be doing: • Design and develop advanced features simulating our world class Switches • Develop solutions using advanced virtualization technology • Write clean, efficient and maintainable code • Collaborate with team members, SW R&D, Architects, Chip Design and FW What we need to see: • B.Sc. degree or equivalent experience in Computer Science / Software Engineering • 5+ years of experience • Proficient knowledge and experience in C/C++ • Strong design, coding, analytical, debugging and problem-solving skills • Full ownership & end-to-end responsibility • Excellent social and written communication skills Ways To Stand Out From The Crowd: • Can do attitude, independency and agility • Ability to quickly adapt to new technology and go deep into new areas • Understanding of Networking Protocols – Ethernet, InfiniBand is an advantage • Knowledge of Virtualization, especially with KVM/QEMU is an advantage • Knowledge of Linux/Windows kernel and drivers development is an advantage NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us. If you're creative, passionate, and self-motivated, we want to hear from you! We are looking for an experienced customer-facing software and systems engineer with a strong background in enterprise infrastructure, cloud technologies, virtualization, and Kubernetes. The ideal candidate combines hands-on software engineering and troubleshooting with the ability to understand customer requirements, lead technical discussions, and work across engineering teams to deliver practical solutions. You will join a team of Solution Engineers focused on NVIDIA Networking, DGX Platforms, Container Orchestrators, Deep Learning containers, and other Enterprise-related system software. The focus of this role is user-space networking software, containerized services, and management and diagnostic tools, including those used with SONiC and NVIDIA NVOS. SW Solution Engineers spend approximately 50% of their time helping customers with their most complex problems and 50% doing R&D-related work. In this role, you will apply your experience across software, operating systems, networking, and cloud infrastructure to resolve customer issues and develop capabilities that make future investigations faster and more effective. What you'll be doing: • Take ownership of enterprise customer issues involving user-space networking software, containerized services, and infrastructure integration across on-premises, cloud, virtualized, and Kubernetes environments, driving investigations from initial engagement through resolution. • Work directly with customers to understand their architecture, workloads, and operational requirements. Lead technical discussions, structure troubleshooting activities, and communicate findings, recommendations, and next steps clearly. • Collaborate with software, platform, and networking engineering teams to solve user-space issues, analyze service dependencies, configuration, and logs, and validate fixes across relevant software versions and deployment environments. • Develop software tools and automation that improve the deployment, availability, reliability, and supportability of NVIDIA Enterprise solutions. • Own the development and ongoing operation of NVEX Networking tools, dashboards and automation pipelines. Prioritize improvements, maintain code and test coverage, manage releases and documentation, and automate diagnostic collection, environment preparation, issue reproduction, validation, and reporting to accelerate customer issue resolution. • Share troubleshooting knowledge, guide engineers through technical reviews, and help customers and internal teams adopt reliable deployment and operational practices. What we need to see: • BSc in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience. • 8+ years of experience across software engineering, systems engineering, or technical solution delivery, including hands-on development and troubleshooting of complex enterprise environments. • Extensive experience working directly with enterprise customers, translating requirements into technical solutions, leading technical discussions, and communicating effectively with engineering and business stakeholders. • Strong analytical and problem-solving skills, intellectual curiosity, self-motivation, and the ability to collaborate across technical disciplines and take issues through to resolution. • A strong software engineering background, including development of tools and automation, source control, code reviews, automated testing, pipeline implementation, and flow/agent automation. Hands-on scripting experience. • Practical experience with cloud and virtualized infrastructure, including compute, virtual networking, hybrid connectivity, deployment, and operations on platforms such as AWS or Azure. • Hands-on experience with Kubernetes and containerized workloads, including deployment, configuration, monitoring, and troubleshooting of the supporting infrastructure. • Experience working with Linux and Windows environments and troubleshooting application and service behavior, configuration, logs, resource usage, and network connectivity. Ways to stand out from the crowd: • Experience deploying, operating, and troubleshooting containerized applications with Docker, Kubernetes/EKS, or ECS, including service lifecycle, configuration, and dependencies. • A record of developing reusable software tools, scripting, infrastructure as code, and engineering pipelines adopted across teams. • Experience automating large-scale server or network environments, including provisioning, software and tool deployment, Linux/Windows compatibility matrices, software-version testing, and test-result aggregation. • Experience implementing centralized logging, monitoring, and reporting with tools to support troubleshooting and operational visibility. • Experience in production deployments, or complex troubleshooting engagements, together with technical workshops, mentoring, and cross-team collaboration.

We are now looking for a Chip Design Verification Engineer. NVIDIA is seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company. What you'll be doing: • Develop shared verification code and solutions to be widely used by the chip design team. • Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems. • Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation. • Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process. • Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design. • Collaborate with designers, verification specialists to accomplish your tasks. • Develop training sessions. What we need to see: • A Bachelor's Degree in Electrical Engineering or Computer Science. • 5+ years of relevant experience • Exposure to design and verification tools. • Strong interpersonal skills and ability & desire to innovate. Ways to stand out from the crowd: • Experience in Specman / System Verilog UVM. • Understanding simulation tools. • Experience in building test benches, evaluate coverage and debug simulation failures. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our networking verification team and help us developing great products by raising the efficiency and the quality standard in our chip design team.