Jobs in Tel Aviv-Yafo

NVIDIA networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AI’s Chat-GPT, for example. We believe in our people and products and seek excellent people to join us! We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of NVIDIA’s next generation switch product lines’ performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug. What you'll be doing: • Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers. • Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations. • Define the implementation of debug capabilities to support performance validation and improvements • Understand our system requirement and help define the POR of our switch product line. • Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit understanding of the chip. • Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc. • Thoroughly understand Ethernet, InfiniBand and NvLink protocols. What we need to see: • B.Sc. in Electrical Engineering from a known university • Excellent grades • 5+ years of experience in ASIC design/uarch/arch/performance • At least 4 years of hands on experience in writing Verilog/VHDL or • Strong analytic capabilities, and passion for solving logical issues • Strong debug skills • Ability to drive complex activities involving many interfaces and teams • Good communications skill Ways to stand out from the crowd: • Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc) • Experience as an HW-architect. • Familiar with working on large high-end ASICs. • Experience in performance improvements in ASIC

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing. Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements! What you’ll be doing: • You will be in charge of state of the art Design for Test/ATPG flows and implementation • Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis. • Inventing and maintaining automation flows that provide the short test time to production What we need to see: • 5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools • Experience in Mentor TestKompress ATPG tool and retargeting flow • Strong programming skills in scripting languages • BSc. in Electrical Engineering or Computer engineering • Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility Ways to stand out from the crowd: • Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation • Programming languages: TCL, PRL, Phyton & Unix shell scripts • Experience with ATE and Silicon bring-up NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative and autonomous, we want to hear from you! You will have the opportunity to work on some of the most incredible products on the market today.

For over two decades, NVIDIA has consistently reinvented itself. Our creation of the GPU in 1999 not only fueled the rise of the PC gaming industry but also transformed modern computer graphics and revolutionized parallel computing. In recent years, our work in GPU deep learning has driven the advancement of modern AI, marking the beginning of a new era in computing. NVIDIA is a "learning machine" that continually adapts to challenging new opportunities—ones that only we can solve and that have a global impact. This is our mission: to enhance human creativity and intelligence. We are currently seeking a Power Integrity Engineer. You will collaborate closely with our teams in the USA and India, drawing on extensive knowledge, technologies, and tools. As part of our team, you will contribute to the development of our Ethernet switch system product line, supporting the process from concept through design, implementation, verification, and release to customers. If you enjoy working with talented individuals to achieve ambitious goals, NVIDIA could be the ideal place for you. Our team is dynamic, working with cutting-edge and unique technology. If you’re someone who thrives on challenges, we invite you to join this diverse team and make a significant impact! What you'll be doing: • Ensuring robust power integrity in physical design to optimize power delivery • Design and optimize physical design solutions for power integrity. • Perform power integrity analysis and mitigation. • Focal point for PI for partitions owners. • Collaborate with hardware and design teams on power delivery strategies. • Utilize tools and flow in advance technology to meet project development What we need to see: • B.Sc. or higher in Electrical Engineering or related field: Solid educational foundation in electrical engineering principles, particularly in power integrity and physical design. • 3+ years of experience in power integrity engineering: Proven experience in power integrity analysis, mitigation, and optimization, especially in the context of high-performance computing or networking hardware. • Proficiency with industry-standard PI tools: Hands-on experience with tools such as Cadence, Ansys, or other EM simulation tools, including power delivery network (PDN) analysis and design. • Ability to collaborate across teams: Strong communication and teamwork skills, with a track record of working closely with hardware and design teams to implement power delivery strategies. • Adaptability and problem-solving skills: Ability to thrive in a dynamic, fast-paced environment where quick thinking and creative solutions are often required. Ways to stand out from the crowd: • Advanced degree (M.Sc./Ph.D.) in Electrical Engineering: Specialization in power integrity, signal integrity, or related fields, with a focus on cutting-edge research or projects. • Programming skills: Proficiency in Python, tcl, or other relevant programming languages for automating analysis or enhancing tool capabilities. • Innovative mindset: A demonstrated ability to push the boundaries of what’s possible in power integrity design, contributing to NVIDIA’s legacy of continuous innovation. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is seeking a top SOC Verification Engineer to verify the design and implementation of the world’s leading networking SoCs. In this position, you will get the opportunity to craft complex networking chips and interact directly with architects, designers, and software engineers across sites. This is your chance to shape the future of computing with a world-class team! What you'll be doing: • As a Senior SOC Verification Engineer at NVIDIA, you will technically lead a team of engineers and be responsible for verifying design, architecture, and micro-architecture using advanced verification methodologies. • Define the verification scope and contribute to the development of the verification infrastructure for SOC clock networks. • Verify firmware code, with a specific focus on hardware/firmware interactions. What we need to see: • Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a closely related field (or equivalent experience). • 8+ years of proven experience in SOC verification. • Proficiency in verification methodologies, including crafting reusable verification components. • Knowledgeable in verification using random stimulus, functional coverage, and assertion-based verification methodologies. • Proficiency in Object-Oriented Programming with SystemVerilog. • Proficiency in UVM methodology. • A passion for debugging and outstanding problem-solving skills. • Strong communication skills are required. Way to stand out from the crowd: • Technical leadership experience. • Prior verification experience related to clock networks is a huge plus. • Experience debugging embedded boot and reset sequences. • Experience writing verification plans. • A strong focus on verification and intuition. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry! Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ #LI-Hybrid

NVIDIA is hiring exceptional software engineers to build and optimize the core inference infrastructure for large language models. Join the TensorRT‑LLM team - the group defining how generative AI performs at global scale on NVIDIA GPUs. We’re looking for engineers who love squeezing every drop of throughput, memory efficiency, and scalability out of modern model runtimes. Your work will directly shape the frameworks behind state‑of‑the‑art LLM inference used across NVIDIA and the AI community. Join us to redefine what “fast” means for LLM inference - building the frameworks that power the next generation of generative AI at scale. What you'll be doing: • Design, implement, and optimize high‑performance inference pipelines for large language models running on GPUs • Profile and tune model execution across the stack - from scheduler design to kernel fusions and everything in-between • Design and experiment with memory management strategies for improved memory bandwidth optimization and cache efficiency • Innovate and Implement cutting-edge techniques such as Speculative Decoding, Context Caching, and FP8/INT4 quantization to push the boundaries of tokens-per-second-per-watt • Develop and maintain benchmarking and testing systems that quantify latency, utilization, and efficiency What we need to see: • Bachelor's, Master's, or higher degree in Computer Engineering, Computer Science, Applied Mathematics, or related computing-focused degree (or equivalent experience) • 5+ years of relevant software development experience. • Excellent Python programming skills, software design, and software engineering skills • Experience working with deep learning frameworks like PyTorch and HuggingFace • Experience profiling and debugging performance at all levels - Python runtime, PyTorch internals, and GPU utilization metrics • Awareness of the latest developments in LLM architectures and LLM inference techniques • Proactive and able to work without supervision • Excellent written and oral communication skills in English Ways to stand out from the crowd: • Contributions to inference frameworks such as TensorRT‑LLM, vLLM, SGLang, or similar systems • Demonstrated expertise in performance modeling, memory optimization, distributed model execution or GPU execution workflows • Hands‑on experience with NVIDIA profiling tools (Nsight Systems, PyTorch Profiler, custom benchmarking harnesses) • Strong grasp of the trade‑offs shaping inference efficiency: compute vs. memory, scheduling vs. batching, latency vs. throughput Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com. #LI-Hybrid

Come be part of NVIDIA, the industry leader in AI Data Centers. We are now innovating the future of data center, and defining the next generation of networking solutions. Our team is dedicated to pushing boundaries and overcome the challenges involved in providing high performance data centers. As a Network RDMA Algorithms Architect, you'll contribute to our creative and cooperative setting, focusing on the ConnectX network adapter, SPC-X end to end solution and more exciting technologies. What you'll be doing: • Conduct research and analysis on networking solution and end to end algorithms. • Work with a creative and experienced team to outline the next generation of our RDMA load balance and congestion control algorithms. • Work on simulation environment and on real HW systems • Engage with other research teams to develop Proof of Concepts using our technology. What we need to see: • 2+ years of experience. • B.Sc. in Electrical Engineering or Computer Engineering. • High motivation to learn and explore new fields. • Proven problem-solving skills. • Excellent interpersonal skills. • Knowledge and understanding of compute and networking systems is an advantage. • Passion and attention to detail in building with a high focus on building quality. Ways to stand out from the crowd: • Passion and love for system architecture, including CPU/GPU/Memory/Storage/Networking. • Background with AI workloads. • Background with networking. • Experience in the development of simulation environments. NVIDIA values diversity in employees. We are an equal opportunity employer, not discriminating in hiring or promotions based on various protected characteristics.

We are looking for a Storage Software Architect to join the architecture group. You will be part of a team that shapes the next generation of storage for AI: training, inferencing, KV cache, RAG and more. Utilizing the best from NVIDIA's network products, DPUs and NICs, working closely with hardware architects, SW architects and external customers, defines the programming interfaces, protocols and management. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow. At NVIDIA, we work, think and learn as a team. We thrive in a deeply strong environment and we're passionate about a culture that demands innovation and the highest standards. The rewards are sweet and include collaborating with some of the smartest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to work on products that transform the way people work and play. What you’ll be doing: • Define how storage for AI clusters should look like • Research and analyze AI storage workloads, POC ways to optimize them • Design the storage SW stack for AI, APIs, and offloads • Lead hands-on POCs • Drive HW features to next generation of DPUs and NICs What we need to see: • B.Sc., M.Sc. or Ph.D. in Computer Science or related discipline • 5+ years of experience in a storage company as senior developer or an architect • Experience with AI applications, training and inference, KV cache, RAG, vLLM, NIMs, etc • Ability to quickly adapt to new technology and go deep into new areas • Can work independently • Strong communication skills • Able to work with customers and partners • Drive new solutions based on any issues that arise NVIDIA has continuously reinvented itself over two decades. NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. This is our life’s work — to amplify human imagination and intelligence. With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us and, due to extraordinary growth, our elite engineering teams are fast-growing fast. If you're a creative and autonomous manager with a sincere real passion for technology, we want to hear from you.

NVIDIA is the world leader in accelerated computing, defining the future of AI and high-performance networking. We are seeking a proactive, highly technical Product Security Compliance Architect to join the NVIDIA Networking product security team. In this role, you will bridge the gap between deep system engineering, legal frameworks, and security execution across technologies powering the world’s largest AI clusters. You will act as a technical engine —refining Secure PLC processes, driving complex security certifications, and building automated workflows that scale governance across hardware, firmware, and software products. Integrate global cybersecurity regulations directly into modern hardware and software engineering workflows. You will optimize Secure PLC frameworks, lead technical product evaluations, build compliance automation, and align technical roadmaps with evolving international security standards to scale our product security posture without friction. What You Will Be Doing: • Translate Regulations into Technical Requirements: Analyze global cybersecurity regulations and legal mandates, converting complex compliance standards into actionable technical specifications and engineering rules. • Architect Secure PLC Workflows: Optimize, adapt, and scale Secure Product Development Lifecycle processes, embedding security engineering frameworks directly into active software, firmware, and hardware development pipelines. • Drive Technical Certifications and Audits: Lead end-to-end security evaluations and certification initiatives, conducting deep-dive technical reviews and working directly with lab evaluators and engineering teams. • Build AI and Engineering Automation: Implement hands-on automation frameworks and agentic AI workflows to streamline compliance tracking, evidence collection, and security verification directly within engineering systems. • Partner Across Technical and Executive Teams: Serve as the technical authority partnering with Hardware, Software, Product Management, and Legal teams to deliver actionable insight into our overall product security architecture and compliance readiness. What We Need To See: • Broad Compliance Framework Mastery: Extensive background in secure product and system development lifecycle frameworks, risk management standards, and a strong awareness of global security regulatory trends. • Education and Experience: BSc or MSc in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience, with 5+ years of experience in security engineering, product security governance, or secure development programs. • Deep Secure Development Mastery: Practical expertise with secure development lifecycles, threat modeling, risk engineering, and hardware/software security practices. • Technical and System-Level Depth: Ability to analyze system architectures, low-level firmware, and codebases to ensure technical implementations match governance mandates. • Technical Evaluation Experience: Direct experience leading hardware, firmware, or software products through third-party security evaluations, testing, or formal validations. • Hands-On Coding and Automation Skills: Shown ability to write code and build automation scripts, AI workflows, or tooling to address complex engineering and operational security tasks. • Multi-Functional Technical Leadership: Strong communication and engineering collaboration skills to drive alignment and execution across multidisciplinary technical teams. Ways To Stand Out From The Crowd: • Regulatory Conformity Experience: Experience preparing tech product lines for major conformity assessment regimes (e.g., EU CRA, GDPR). • Hardware and Embedded Systems Security: Direct exposure to silicon security, microarchitectures, low-level firmware, or embedded devices. • Cryptographic Validations: Hands-on experience driving product certification pipelines or module validations with accredited laboratories (e.g., FIPS 140-3, Common Criteria). • Industry Certifications: Credentials highlighting technical security mastery NVIDIA has some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are committed to fostering a diverse work environment and are proud to be an equal-opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA is looking for an outstanding Senior Networking Software Architect to join the NIC/DPU Software and Firmware Architecture group. In this role, you will help define the next generation of NVIDIA datacenter and AI networking platforms, with focus on DPU management, QoS, performance, telemetry, and software architecture across stacks. You will work closely with hardware designers, firmware/kernel driver teams, system engineers, validation, product management and customers. The role spans early architecture definition, pre-silicon design, bring-up, and production readiness for large-scale AI and cloud datacenter deployments. What You’ll Be Doing: • Own software and system architecture for next-generation DPU management, QoS, performance, telemetry, and observability features. • Define end-to-end control and management flows across DOCA, host drivers, embedded firmware, BMC, management controllers and external management systems. • Specify telemetry and observability requirements, including counters, logs, traces, events, health monitoring, debug data, and streaming telemetry. • Define management interfaces and APIs for configuration, provisioning, lifecycle operations, diagnostics, and field serviceability. • Write clear architecture specifications, interface definitions, flow diagrams, and design documents for software, firmware, and system teams. • Partner with R&D teams to translate high-level architecture into implementable designs and guide features through development, validation, silicon bring-up, and production. • Analyze system performance bottlenecks, interoperability issues, telemetry gaps, and customer-reported issues, then feed learnings into future architecture. • Collaborate with system and cluster architects to ensure NIC/DPU features fit end-to-end AI datacenter and cloud networking designs. What We Need To See: • B.Sc. or M.Sc. in Computer Engineering, Computer Science, Electrical Engineering, or equivalent experience. • 9+ years of experience in networking, system software, embedded software, firmware, or datacenter infrastructure. • Proven experience in software architecture, or technical leadership roles. • Deep understanding of networking concepts and protocols such as Ethernet, TCP/IP, RDMA/RoCE, congestion control, QoS, virtualization overlays, and traffic management. • Strong background with DPUs, SmartNICs, or other high-performance networking devices. • Experience with system management, provisioning, monitoring, telemetry, diagnostics, or lifecycle-management flows. • Familiarity with management protocols and frameworks such as Redfish, PLDM, MCTP, IPMI, gNMI, SNMP, Netconf, REST, or gRPC-based APIs. • Ability to lead cross-functional architecture discussions across software, firmware, hardware, validation, product, and customer-facing teams. • Excellent written and verbal communication skills, including the ability to create clear architecture documents and present trade-offs. Ways To Stand Out From The Crowd: • Experience defining software architecture for DPU products, including management, telemetry, QoS, performance, security, virtualization, or offload features. • Hands-on background with Linux networking, device drivers, firmware, embedded Linux, BMC software, DOCA, DPDK, OVS or Kubernetes networking. • Experience with performance counters, profiling tools, eBPF, Prometheus, Grafana, dashboards, heat maps, or large-scale telemetry systems. • Experience in defining and developing GAI-based analysis tools to extract insights from telemetry data and streams. • Background in RAS, diagnosability, serviceability, field failure analysis, production debug, or customer escalation handling. NVIDIA is widely considered one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the industry working with us, and we are building the networking platforms that power the AI revolution. If you are passionate about NICs, DPUs, system software, and large-scale AI networking, and you want to shape the management, telemetry, QoS, and performance architecture of future NVIDIA platforms, we want to hear from you.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. What you'll be doing: • Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design). • Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues. • Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks • Taking part in flows development and deployment What we need to see: • B.SC./ M.SC. in Electrical Engineering/Computer Engineering. • 7+ years of actual design experience in chip design • Solid hands-on RTL design skills in System-Verilog • Proficiency in at least one scripting languages like python, bash, tcl. • Great teammate. Way to stand out from the crowd: • Passion for quality. Experience with delivery to physical design, emulation, firmware and other customers NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry! #LI-Hybrid

We are seeking a highly motivated Senior FW MNG Architect to join our team of specialists and help build the future of high-performance computing. Our next InfiniBand, NVL, and Ethernet switches will play a key role in linking and powering some of the most advanced compute clusters globally. In this Architect role, you will define the Architecture of the firmware management of our next-generation switches that support many innovative compute clusters and supercomputers. What you'll be doing: • Collaborate with multi-functional teams, including other architecture teams, system software, firmware, and hardware teams, to ensure the successful execution of the project. • Defining the build framework for firmware management, power, and thermal running on switches. • Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architect What we need to see: • BSc or MSc in Electrical Engineering / Computer Science or equivalent experience. • 5+ years of practical experience in firmware design and/or firmware architecture. • Excellent communication skills to effectively work with diverse teams and collaborators. • Can-do attitude and high energy with leadership and excellent interpersonal skills, and the ability to learn sophisticated concepts in a fast-paced environment. • Strong managerial, problem-solving, and critical thinking skills. Ways to stand out from the crowd: • Knowledge of Ethernet/IP technologies, cloud, or data-center technologies. • Experience in programming computer networks. • Strong understanding of system build principles. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA is looking for best-in-class Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you will be doing: • Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance. • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems. • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification. • Taking part inflows development. • Act as Partition/Unit level physical design technical leader and focal point. What we need to see: • B.SC./ M.SC. in Electrical Engineering/Computer Engineering. • 5+ years of experience in physical design. • Proven experience in RTL2GDS flows and methodologies. • Knowledge in physical design flows and methodologies (PNR, STA, physical verification). • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). • Great teammate. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and state of the art accelerated compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas. We pioneered a supercharged form of computing loved by the fastest paced computer users in the world - scientists, designers, artists, and gamers. We are seeking a highly motivated architect to join our team of experts and take part in shaping the future of high-performance ML / AI computing. Our next-generation Spectrum-X, InfiniBand and NVLink systems will be at the heart of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today. As a system/software architect at NVIDIA, you will have the opportunity to work on some of the most innovative technology that is currently driving the world forward. What you’ll be doing: • Define the next generations of Spectrum-X, InfiniBand and NVLink SW architecture. • Research of various solutions by defining and running POCs, evaluate SW and HW impact and conveying the solution architecture to the relevant teams. The solutions can span over various layers: from algorithms and high level software to firmware and HW. • Collaborate with multi-functional teams, including other architecture teams, VLSI logic design, system software, firmware, and research teams, to ensure the successful execution of the project. What we need to see: • B.Sc in Computer Science, Computer Engineer or Electrical Engineer. • At least 5 years proven experience in VLSI, FW or SW design/architectural roles. • Good grasp of networking layers and SW-HW co-design. • Possess strong managerial, problem solving and critical thinking skills. • Ability to work and operate in a highly dynamic environment on multiple concurrent projects with multiple groups. Ways to stand out of the crowd: • M.Sc / PhD in relevant fields (Math, Computer Science, Computer Engineer or Electrical Engineer). • Knowledge/hands-on experience in network protocols - such as InfiniBand, IP, TCP and RoCE. • Knowledge/experience in network topologies, LLM or DL (research or design). • Architectural experience in SW-HW co-design. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA’s Networking System Validation Group is growing, and we are hiring a Senior Switch System Validation Engineer. As a member of the team, you will take part in NVIDIA’s core network projects which drive the growth of the company, tech and business wise. You'll gain networking and Switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like Quality-of-Service, performance, logic correctness, and AI features. You will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages. You should have a good grasp of software development in different fields, such as Python Scripting, embedded software, and device firmware. It's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans.   What you will be doing: • Work in a combined design and verification team specializing in Switch Full Chip works • Understand the Switch architecture and build on test plan accordingly • Develop Full Chip test collaterals/suites, maintain regressions, debug failures and sign-off coverages • Maintain test suites to facility Emulation and/or Silicon platforms checkout as well What we need to see: • B.Sc. in Electrical Engineering, Computer Engineering, or Computer Science • 4+ years of experience. • Knowledge in Python and experience with C and C++ in a Linux environment • Understanding and familiarity of networking designs and micro-architecture • Outstanding ability to communicate, clearly present one's ideas, and able to work as a team   Ways to stand out from the crowd: • Prior knowledge/experience with network protocols • Experience with Object Oriented Programming, Operating Systems and Multi-Threaded application development NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field

NVIDIA has been transforming computer graphics, PC gaming, accelerated computing, and AI for more than 25 years. Today, we are defining the next era of computing, where AI datacenters, GPUs, networking, and accelerated infrastructure work together as one system. We are looking for an outstanding engineer to join our software architecture group and help shape the next generation of NVIDIA networking products, SmartNICs, and DPUs. In this role, you will work closely with system architects, software/firmware engineers, hardware designers and product stakeholders to define component-level and system-level solutions for advanced datacenter platforms. You will join a team working at the intersection of AI networking, virtualization, operating systems, security, management, and programmable acceleration. Our mission is to push the boundaries of modern datacenter infrastructure and help define the platforms of tomorrow. What You’ll Be Doing: • Work with architects and engineers to define software architecture for NVIDIA networking devices, SmartNICs, and DPUs. • Analyze system requirements across networking protocols, virtualization, operating systems, security, management, and services. • Research new ideas, evaluate design alternatives, and build proof-of-concept models, simulations, and prototypes. • Collaborate with software, firmware, and hardware teams on HW/SW co-design, performance, scale, and resource-utilization challenges. • Learn complex datacenter technologies and turn them into clear architecture proposals, design documents, and technical presentations. What We Need To See: • Engineer holding a B.Sc. or M.Sc. in Computer Science, Electrical Engineering, Computer Engineering, or a related field. • 1+ years of relevant experience • Proven strong programming skills, in C/C++, preferably for large and complex embedded systems. • Solid understanding of operating systems, multi-threading, computer architecture, and software fundamentals. • Curiosity and ability to learn new technologies quickly, investigate deeply, and work through ambiguous problems. • Independent problem solver who also works well in a team environment. • Clear written and verbal communication skills. Ways To Stand Out From The Crowd: • Knowledge of networking protocols such as Ethernet, InfiniBand, RDMA, RoCE, TCP/IP, or congestion control. • Experience with Linux, Linux kernel, device drivers, embedded systems, or system software. • Experience building simulations, performance models, prototypes, or proof-of-concept software. • Exposure to virtualization, security, programmable acceleration, SmartNICs, DPUs, or DOCA. • Open-source contribution, previous internship experience, or hands-on project work in relevant technical domains. NVIDIA is widely considered one of the technology world’s most desirable employers. We are made up of forward-thinking, hardworking people who are passionate about solving some of the world’s most important computing challenges. NVIDIA is committed to fostering a diverse and inclusive work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a strong RTL Design Engineer to own the SOC clocking logic for our next-generation networking chips. Clocks are the backbone of the SOC. In this role you will own the clock generation, distribution, and control logic for the entire chip — PLL and reference clock integration, clock muxing and dividers, glitchless switching, clock gating, reset synchronization, and the clock domain crossing infrastructure that every unit on the die depends on. This is an RTL design role, not a circuit or transistor-level design role. You will translate micro-architecture specifications into high-quality synthesizable RTL, and drive that RTL through to silicon in close partnership with the micro-architecture, Design Verification, and Physical Design (backend) teams. You will also interact with CAD, Package Design, Software, and DFT teams. What you'll be doing: • Owning the SOC clocking logic end to end: writing synthesizable Verilog/SystemVerilog RTL for clock generation, distribution, muxing, division, glitchless switching, gating, and reset synchronization, from micro-architecture specification through tape-out • Defining and implementing the SOC clock and reset architecture together with the micro-architecture team — collecting clocking requirements from every unit on the chip and turning them into a coherent, verifiable design • Owning clock domain crossing infrastructure and CDC closure across the SOC • Partnering with the micro-architecture team to review specifications, close on design intent, and provide feedback on implementation cost, timing, area, and power • Working hand-in-hand with the Physical Design (backend) team on clock tree implementation and constraints, partitioning, floorplan and timing feedback, trial synthesis, congestion and timing convergence, and physical design readiness • Supporting Software and firmware teams on clock programming sequences, DVFS, and low-power/clock-shutdown flows • Driving design quality: lint, CDC/RDC, formal checks, synthesis QoR, connectivity and structural checks • Supporting SOC-level chip build and assembly, and developing/deploying automation flows that make RTL integration and design quality checking repeatable and scalable • Supporting emulation, firmware, and post-silicon bring-up customers of your design What we need to see: • B.Sc./M.Sc. in Electrical Engineering or Computer Engineering • 3+ years of relevant experience in RTL/logic design • Solid hands-on RTL design skills in Verilog/SystemVerilog, with a good understanding of synthesis, timing, and how RTL choices affect the physical implementation • Experience taking a design from micro-architecture specification through verification and physical implementation • Solid understanding of clocking and reset concepts: clock gating, clock muxing and dividers, glitchless clock switching, reset synchronization, and clock domain crossing • Familiarity with design quality tooling (lint, CDC/RDC, formal, synthesis) • Great teammate with strong communication skills across micro-architecture, DV, and backend teams Ways to stand out from the crowd: • Passion for quality, and a track record of clean deliveries to physical design, DV, emulation, firmware, and other downstream customers • Prior ownership of SOC-level clocking or reset architecture on a taped-out chip • Experience with PLL/clock generator integration and clock tree constraint development with backend teams At NVIDIA, you will be immersed in a diverse and encouraging environment where everyone is encouraged to do their best work. Join us and see how you can make a lasting impact on the world. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law

We are now looking for a Power Optimization and Analysis Engineer! NVIDIA prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units’ power efficiency; you will be responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of NVIDIA Switches product line. As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for NVIDIA's next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements. What You'll Be Doing: • Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency. • Develop and share best practices for performing pre-silicon power analysis. • Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny. • Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes. • Select and run a wide variety of workloads for power analysis. • Prototype new architectural features in Verilog and power analysis. What We Need To See: • BSC or MS in Computer Engineering or Electrical Engineering • 5+ years of experience in chip design • Good and interpersonal skills; much collaboration with design teams is expected. • Familiarity with Verilog and ASIC design or verification. • Desire to bring data-driven decision-making and analytics to improve our products. • Strong coding/automation skills, preferably in Python, Perl, and C++. Ways to Stand Out From the Crowd: • Experience with Power Artist, PTPX (Prime Power RTL, RTL Architect). • Strong understanding of concepts of energy consumption, estimation, data movement and low power design.

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company. What you'll be doing: • Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance. • Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems. • Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification. • Taking part in flows development. What we need to see: • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience. • 5+ years of experience in Physical Design. • Proven experience in RTL2GDS flows and methodologies. • Knowledge in physical design flows and methodologies (PNR, STA, physical verification). • Deep understanding of all aspects of Physical construction and Integration. • Strong background of Physical Design Verification methodology LVS/DRC. • Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc). • Great teammate. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!

We are looking for a highly motivated Senior Network Architect specializing in Advanced Packaging, to join our expert team and contribute to the advancement of high-performance computing. Our future InfiniBand, NVL, and Ethernet switches will be central to connecting and powering the world’s most advanced compute clusters. These include supercomputers dedicated to AI research and high-performance clusters in various sectors. As an Architect of Advanced Packaging at NVIDIA, you will engage with innovative technology. You will help create next-generation large radix switches. The products you develop will support many pioneering compute clusters and supercomputers. What you'll be doing: • Collaborate with cross-functional teams, including other architecture teams, logic build, system and hardware teams, to ensure the successful execution of the project optimizing our solution. • Crafting and architecting advanced packaging solutions for NVIDIA Systems. • Analyzing and determining the best approaches for our switch system solutions. • Successfully implementing and managing projects to meet ambitious performance targets. What we need to see: • BSc or MSc in Electrical Engineering / Computer Science or equivalent experience. • A proven track record with a minimum of 8 years of experience in Advanced Packaging. • Deep understanding of how to build and integrate systems with various technology components. • Proficiency in advanced system-level high-speed connectivity. • Excellent communication skills to effectively work with diverse teams and collaborators. • Can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn sophisticated concepts in a fast-paced environment. • Possess strong managerial, problem-solving, and critical thinking skills. • Attention to details on building and high focus on build quality. NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical build team in the industry!

NVIDIA Networking product security team is looking for an outstanding technical security architect with hands-on experience to help us improve the security posture of NVIDIA networking products. In this role you will partner with firmware, hardware, and architecture teams on the security architecture, to reduce risk, threats, and vulnerabilities while driving new security features that affect millions of devices all over the world! What you'll be doing: • Be involved in the security architecture of NVIDIA Networking firmware — trust boundaries, privilege separation between firmware domains, device identity and key storage, secure boot and chain of trust, and secure update and anti-rollback flows. • Perform security threat modeling of firmware and embedded subsystems across NVIDIA Networking products. • Analyze complex firmware and hardware/firmware interactions to identify security weaknesses, including boot flows, privileged execution environments, and host- and network-facing management interfaces. • Define security features and mitigations spanning the full device lifecycle — provisioning, attestation, debug authorization, runtime hardening, and field update. Guide the engineering teams throughout the implementation. • Translate threat models into actionable security requirements and architectural decisions, and review designs and implementations against them. • Partner with hardware and ASIC architects to specify the security primitives firmware depends on, and define how they are used across the product line. • Drive secure development practices for firmware — memory-safe coding patterns in C, static analysis, and fuzzing of firmware-exposed interfaces — and make sure development processes meet security and coding standards. What we need to see: • Academic degree in computer science, electrical engineering, or related field. Candidates with equivalent work experience will also be considered. • Demonstrated experience of 5+ years in product security, firmware security, or security research, including hands-on work with embedded or firmware codebases. • Experience defining security policy models — authorization schemes, RBAC, and administrative role separation — including how policy is expressed, enforced, and administered in production. • Familiarity with applied cryptography (including secure boot, code signing, and attestation), threat modeling, common attack vectors, and mitigation techniques. • Ability to work independently, and collaboratively in a constantly evolving environment. • Excellent communication and interpersonal skills. Ways to stand out from the crowd: • M.Sc. or PhD in computer science, electrical engineering, or related technical field. • Experience with hardware/software interfaces in networking devices — register and MMIO programming models, DMA, mailbox and doorbell mechanisms, PCIe configuration and management interfaces, and the firmware that drives them. • Experience with hardware roots of trust and hardware-enforced isolation (MPU/MMU, secure enclaves, fuse/OTP-based provisioning) in SoCs or ASICs. • Hands-on experience with networking software — device drivers, control plane, management interfaces, or embedded network operating systems — and an understanding of how these components interact with firmware. • Familiarity with high-scale deployment, the data center security ecosystem and its operational challenges. With highly competitive salaries and a comprehensive benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people on the planet working for us and, due to unprecedented growth, our special engineering teams are growing fast. If you're a creative and autonomous engineer with a genuine passion for technology, we want to hear from you. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.