Verification Engineer jobs in Israel

Description NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains. At NextSilicon, everything we do is guided by three core values: • Professionalism: We get exceptional results through professionalism and unwavering dedication to quality and performance. • Unity: Collaboration is key to success; we foster a work environment where every employee feels valued and heard. • Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide. We are looking for a talented and experienced engineer to take part in the verification efforts for the company’s core product. This position involves building a complex verification environment from scratch, and defining and executing a test plan. In this role, you will be leading verification from A to Z and will have a critical impact on the company. Requirements • 6+ years of verification experience, including hands-on experience building complex environments from scratch • Advanced knowledge of verification flow, SOC architecture and design • Expertise in verification languages such as SystemVerilog, UVM, Spaceman • Knowledge of industry standard tools, including Verilog, Verilog simulator, and debug • Clear understanding of constrained random verification process, functional coverage, code coverage, and assertion methodology and philosophy • Bachelor degree in electrical engineering or computer science, or equivalent experience Responsibilities • Review specifications and develop attributes, tests, and coverage plans • Define methodology and test benches • Work closely with the verification team to ensure the quality of the product • Build and maintain a smart and scalable verification environment that ties into various systems • Work with the software, design, and micro-architecture teams to understand the functional and performance goals of the product’s design

Description For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Senior Verification Engineer to be driving into the complicated RTL design verification activity on various design aspects. Requirements Key responsibilities: • Ownership of block\cluster verification end to end from scratch. • Lead efforts of test bench architecture, Vplan definition and functional coverage. • Work closely with the design, architecture, algo teams and other stakeholders. • Support other team members and mentor less experienced engineers. Requirements • 10+ years of experience – a must • Performed at last 2 or more full block/system verification cycles. • In depth knowledge in VLSI verification flow, languages and concepts. • Experience in data path or data protocols, specifically Ethernet - preferred • Verification using one of the known methodologies (eRM, UVM, OVM). Responsibilities • Plan and perform the verification of digital design blocks according to the design specification and interacting with design engineers. • Build verification environments using SystemVerilog and UVM. • Identify and write all types of coverage measures for corner-cases. • Debug the functionality with design engineers. • Perform coverage collection and follow the metrices to close the full functionality.

Description For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Verification Team-Leader to be driving into the complicated RTL design verification activity on various design aspects. Requirements Key Responsibilities • Lead, mentor, and manage a team of verification engineers to meet project milestones and deliverables. • Define and execute verification strategies and plans for complex digital blocks and systems. • Oversee the development of robust and reusable verification environments using SystemVerilog and UVM. • Review and approve verification plans, testbenches, and coverage metrics. • Drive functional and coverage-based verification across multiple block/system verification cycles. • Collaborate with design engineers to debug and resolve functionality issues. • Ensure effective resource allocation and project planning to achieve optimal results. • Foster a culture of technical excellence, continuous learning, and innovation within the team. • Report verification progress, issues, and risks to senior management and other stakeholders. Required Qualifications • 8+ years of experience in digital design verification—a must. • 3+ years of experience managing or leading verification teams. • Proven track record of completing two or more full block/system verification cycles. • In-depth knowledge of VLSI verification flows, concepts, and methodologies. • Expertise in verification using SystemVerilog, UVM, or other industry-standard methodologies (eRM, OVM). • Experience with data protocols or data path designs (Ethernet experience preferred). • Experience with Ai, agent build, integration to flow and shorten verification cycle time. • Strong problem-solving skills and the ability to debug complex functionality issues. • Excellent leadership, communication, and organizational skills to manage and inspire a team. Preferred Qualifications • Hands-on experience with high-speed communication protocols like Ethernet, PCIe, or SerDes. • Proficiency in scripting languages (e.g., Python, Perl) for automation of verification processes. • Familiarity with formal verification techniques and tools. • Background in system-level verification or post-silicon validation. • Experience with project planning tools and methodologies for effective team management.

Meet the Team We are a leading Design for Test (DFT) group, delivering end-to-end solutions for Cisco’s flagship products, including Cisco Silicon One. Our chips are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. We push the boundaries of technology by developing innovative DFT solutions that drive industry-leading programmability, scalability, test quality, and performance. Our team operates in a hybrid model, with three days a week in the office in Midtown Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation. Role Focus: We are looking for an experienced Design Verification engineer to join our DFT team and help establish and grow DFT DV activity in the Cisco SiliconOne DFT team. This role is relevant for engineers with experience in DV roles, either in DFT DV or in other verification domains, who are interested in becoming familiar with DFT design, verification methodologies, and the challenges of validating testability features in advanced silicon. Your Impact Lead and drive DFT verification activities within the Cisco SiliconOne DFT team. Develop verification plans, environments, checkers, assertions, and coverage models for DFT features. Verify DFT architecture and implementation in close collaboration with DFT, design, architecture, and verification teams. Work on verification of scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features. Debug complex pre-silicon issues across RTL, verification environments, and DFT logic. Contribute to scalable methodologies, reusable verification components, and best practices for DFT DV. Help bridge between general DV methodologies and DFT-specific design and verification needs. Minimum Qualifications • B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field. • 5+ years of experience in design verification roles. • Strong experience with SystemVerilog and UVM-based verification environments. • Experience developing verification plans, coverage models, assertions, and debug flows. • Strong communication skills and ability to work closely with cross-functional teams. • Motivation to learn DFT concepts and become a key contributor in the DFT DV domain. Preferred Qualifications • Familiarity with DFT concepts such as scan insertion, memory BIST, ATPG, boundary scan, and silicon test flows. • Experience with complex SoC verification, networking silicon, or high-performance AI-driven silicon. • System-level understanding of large-scale chip architecture and integration. • Ability to build new methodologies and establish verification activity from the ground up. • High attention to detail, ownership mindset, and willingness to grow into new technical domains. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.

Description Wiliot was founded by the team that invented one of the technologies at the heart of 5G. Their next vision was to develop an IoT sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the IoT. This revolutionary mixture of cloud and semiconductor technology is being used by some of the world’s largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products. Our investors include Softbank, Amazon, Alibaba, Verizon, NTT DoCoMo, Qualcomm and PepsiCo. Wiliot is looking for a talented and experienced engineer to take part in the verification efforts for the company’s core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path. Responsibilities: • Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration. • Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality. Responsibilities • Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration. • Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality. Requirements • Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience. • 5+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered) • Self-motivated and able to lead and drive tasks to completion. • Great interpersonal skills. • Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, Unix/Linux environments, scripting languages (Python, etc.) and version control. Advantages • Knowledge in Low Power Verification and UPF standard. • Knowledge in Mix signals SoCs. • Experience with SW/HW Co-development #LI-Hybrid

Mobileye SOC verification group owns the important and challenging job of verifying Mobileye's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, you’ll get the chance to work at one of the most professional verification teams. What will your job look like: • You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field. • Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals. • You'll have a broad effect on our unique product from the very beginning of the process. All you need is: • BSc in electrical engineering, computer engineering or computer science. • 7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV). • TestPlan defining and Coverage-Driven Verification experience. • Fullchip/SOC verification experience, strong system understanding. • Good debug capabilities using the latest EDA tools. • Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI. Nice to have: • SW embedded experience, C/C++ skills. • Strong skills in scripting Perl/Python. • System Verilog writing skills, preferably in OVM/UVM. • 3rd-party IPs integration testing experience. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

The Mobileye Automated Driving Hardware group in Haifa is looking for an Experienced Formal Verification Engineer to join a team of talented engineers developing next-generation silicon for autonomous driving platforms. This is a unique opportunity to enter one of the most challenging and rewarding disciplines in hardware development. Formal Verification combines deep understanding of computer architecture, digital design, and advanced verification methodologies to prove hardware correctness and uncover bugs that traditional testing may never find. What will your job look like: • Be the owner of formal verification environment from first draft to sign-off stage. • Apply formal methods to verify the correctness of various complex digital systems. • Work with HW architects\designers to define assumptions, rules and cover properties. • Help define the formal verification methodology and environment to be applied by the team. • Explore new Formal methods and Tools. • Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago. • Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues. • Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf. All you need is: • BSc in electrical engineering, computer engineering, or computer science. • Passion for the field of Formal Verification. • 5+ years of experience in Formal Verification. • Experience coding system-verilog hardware description language. • Experience with scripting languages (e.g. python, tcl ). • Strong analytical and problem solving skills. • Ability to work independently and in a team-oriented environment. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Mobileye SOC verification group owns the important and challenging job of verifying Mobileye's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, you’ll get the chance to work at one of the most professional verification teams. What will your job look like: • You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field. • Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals. • You'll have a broad effect on our unique product from the very beginning of the process. All you need is: • BSc in electrical engineering, computer engineering or computer science. • 7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV). • TestPlan defining and Coverage-Driven Verification experience. • Fullchip/SOC verification experience, strong system understanding. • Good debug capabilities using the latest EDA tools. • Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI. Nice to have: • SW embedded experience, C/C++ skills. • Strong skills in scripting Perl/Python. • System Verilog writing skills, preferably in OVM/UVM. • 3rd-party IPs integration testing experience. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

We are looking for a Senior Formal Verification Engineer for our NVIDIA Networking team! This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. NVIDIA has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious. What you'll be doing: • In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems. • You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of NVIDIA's core technology. • You will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations. What we need to see: • BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience. • 5+ years of relevant experience. • Excellent analytical, logical reasoning and problem-solving skills. • Strong debugging and analytical skills. • Strong communication and interpersonal skills are required. Ways to stand out from the crowd: • Formal verification work experience. • Knowledge of digital logic. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our team and help us build the future HPC and data centers. #LI-Hybrid