Verification Engineer jobs in Ramat Gan

Description For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Senior Verification Engineer to be driving into the complicated RTL design verification activity on various design aspects. Requirements Key responsibilities: • Ownership of block\cluster verification end to end from scratch. • Lead efforts of test bench architecture, Vplan definition and functional coverage. • Work closely with the design, architecture, algo teams and other stakeholders. • Support other team members and mentor less experienced engineers. Requirements • 10+ years of experience – a must • Performed at last 2 or more full block/system verification cycles. • In depth knowledge in VLSI verification flow, languages and concepts. • Experience in data path or data protocols, specifically Ethernet - preferred • Verification using one of the known methodologies (eRM, UVM, OVM). Responsibilities • Plan and perform the verification of digital design blocks according to the design specification and interacting with design engineers. • Build verification environments using SystemVerilog and UVM. • Identify and write all types of coverage measures for corner-cases. • Debug the functionality with design engineers. • Perform coverage collection and follow the metrices to close the full functionality.

Description For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Verification Team-Leader to be driving into the complicated RTL design verification activity on various design aspects. Requirements Key Responsibilities • Lead, mentor, and manage a team of verification engineers to meet project milestones and deliverables. • Define and execute verification strategies and plans for complex digital blocks and systems. • Oversee the development of robust and reusable verification environments using SystemVerilog and UVM. • Review and approve verification plans, testbenches, and coverage metrics. • Drive functional and coverage-based verification across multiple block/system verification cycles. • Collaborate with design engineers to debug and resolve functionality issues. • Ensure effective resource allocation and project planning to achieve optimal results. • Foster a culture of technical excellence, continuous learning, and innovation within the team. • Report verification progress, issues, and risks to senior management and other stakeholders. Required Qualifications • 8+ years of experience in digital design verification—a must. • 3+ years of experience managing or leading verification teams. • Proven track record of completing two or more full block/system verification cycles. • In-depth knowledge of VLSI verification flows, concepts, and methodologies. • Expertise in verification using SystemVerilog, UVM, or other industry-standard methodologies (eRM, OVM). • Experience with data protocols or data path designs (Ethernet experience preferred). • Experience with Ai, agent build, integration to flow and shorten verification cycle time. • Strong problem-solving skills and the ability to debug complex functionality issues. • Excellent leadership, communication, and organizational skills to manage and inspire a team. Preferred Qualifications • Hands-on experience with high-speed communication protocols like Ethernet, PCIe, or SerDes. • Proficiency in scripting languages (e.g., Python, Perl) for automation of verification processes. • Familiarity with formal verification techniques and tools. • Background in system-level verification or post-silicon validation. • Experience with project planning tools and methodologies for effective team management.

Mobileye SOC verification group owns the important and challenging job of verifying Mobileye's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, you’ll get the chance to work at one of the most professional verification teams. What will your job look like: • You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field. • Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals. • You'll have a broad effect on our unique product from the very beginning of the process. All you need is: • BSc in electrical engineering, computer engineering or computer science. • 7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV). • TestPlan defining and Coverage-Driven Verification experience. • Fullchip/SOC verification experience, strong system understanding. • Good debug capabilities using the latest EDA tools. • Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI. Nice to have: • SW embedded experience, C/C++ skills. • Strong skills in scripting Perl/Python. • System Verilog writing skills, preferably in OVM/UVM. • 3rd-party IPs integration testing experience. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Mobileye’s Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of Mobileye’s future AI and deep learning HW accelerators. This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver Mobileye’s EyeQ future chips, aimed to power the world’s first fully Autonomous Vehicle! What will your job look like: • Define, implement and enhance verification environments using UVM methodology. • Write and debug tests that combine UVM methodology and SW code. • Identify and write various types of coverage measures. • Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment. • Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs. All you need is: • BSc in electrical engineering, computer engineering, or computer science. • 8+ years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++). • System Verilog writing skills, preferably in OVM/UVM. • SW embedded experience, C/C++ skills. • TestPlan defining and Coverage-Driven Verification experience. • 3rd-party IPs integration testing experience. • Waveform debugging with the latest EDA tools, root-cause bugs independently. Nice to have: • Skills in scripting Perl/Python. • Knowledge in Industry Standard protocols such as AXI/OCP/APB. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!