Verification Engineer jobs in Haifa

Job Details: Job Description: We're looking for talented, self-motivated engineers to join our Design Verification (DV) team in a junior or mid-level position. We work on some of the most technically challenging silicon in the industry, spanning digital and analog design, DSP pipelines, and firmware-hardware co-verification. What We Build Our team develops and verifies high-speed SerDes IP, the physical layer technology that moves data at speeds from 10Gbps to 100Gbps+ across PCIe, Ethernet, and other industry-standard interfaces. Getting this right matters, the world's data moves through what we build. What You'll Work On • Constrained-random and coverage-driven verification of complex high-speed SerDes mixed-signal IP, including advanced verification environment development • Validation of DSP datapaths • FW/HW joint verification • Leveraging AI-assisted tools as a core part of your daily engineering workflow What We're Looking For • Bachelor's degree in EE, CE, or CS — recent graduate with a strong academic record • Solid grasp of digital design, computer architecture, and software programming • Analytical mindset — you enjoy root-causing problems, not just finding them • Ability to thrive in a dynamic, multi-disciplinary environment • Hands-on exposure to SystemVerilog/UVM or Python — a significant advantage, but not required What We Offer • A collaborative and innovative environment where great ideas come from every level of the team • A great place to work — we take the work seriously, and each other's success personally • Exposure to the full verification lifecycle — from spec to tape-out sign-off • A team culture that embraces modern tooling, including AI-assisted engineering, as a competitive advantage • A real growth path from day one Qualifications: • Bachelor's degree in electrical engineering, Computer Engineering, or Computer Science • 0–3 years of industry or academic experience in hardware design or verificationNice to Have • Hands-on experience with SystemVerilog/UVM • Python scripting for verification automation • Familiarity with mixed-signal or analog simulation concepts • Knowledge of high-speed protocols such as PCIe or Ethernet • Prior internship or experience in RTL design or verification • Strong academic record; top graduating students are encouraged to apply Job Type: Regular Shift: Shift 1 (Israel) Primary Location: Jerusalem, Israel Additional Locations: Haifa, Israel, TLV Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Mobileye SOC verification group owns the important and challenging job of verifying Mobileye's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, you’ll get the chance to work at one of the most professional verification teams. What will your job look like: • You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field. • Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals. • You'll have a broad effect on our unique product from the very beginning of the process. All you need is: • BSc in electrical engineering, computer engineering or computer science. • 7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV). • TestPlan defining and Coverage-Driven Verification experience. • Fullchip/SOC verification experience, strong system understanding. • Good debug capabilities using the latest EDA tools. • Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI. Nice to have: • SW embedded experience, C/C++ skills. • Strong skills in scripting Perl/Python. • System Verilog writing skills, preferably in OVM/UVM. • 3rd-party IPs integration testing experience. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

The Mobileye Automated Driving Hardware group in Haifa is looking for an Experienced Formal Verification Engineer to join a team of talented engineers developing next-generation silicon for autonomous driving platforms. This is a unique opportunity to enter one of the most challenging and rewarding disciplines in hardware development. Formal Verification combines deep understanding of computer architecture, digital design, and advanced verification methodologies to prove hardware correctness and uncover bugs that traditional testing may never find. What will your job look like: • Be the owner of formal verification environment from first draft to sign-off stage. • Apply formal methods to verify the correctness of various complex digital systems. • Work with HW architects\designers to define assumptions, rules and cover properties. • Help define the formal verification methodology and environment to be applied by the team. • Explore new Formal methods and Tools. • Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago. • Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues. • Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf. All you need is: • BSc in electrical engineering, computer engineering, or computer science. • Passion for the field of Formal Verification. • 5+ years of experience in Formal Verification. • Experience coding system-verilog hardware description language. • Experience with scripting languages (e.g. python, tcl ). • Strong analytical and problem solving skills. • Ability to work independently and in a team-oriented environment. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Mobileye’s Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of Mobileye’s future AI and deep learning HW accelerators. This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver Mobileye’s EyeQ future chips, aimed to power the world’s first fully Autonomous Vehicle! What will your job look like: • Define, implement and enhance verification environments using UVM methodology. • Write and debug tests that combine UVM methodology and SW code. • Identify and write various types of coverage measures. • Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment. • Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs. All you need is: • BSc in electrical engineering, computer engineering, or computer science. • 4 years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++). • System Verilog writing skills, preferably in OVM/UVM. • SW embedded experience, C/C++ skills. • TestPlan defining and Coverage-Driven Verification experience. • 3rd-party IPs integration testing experience. • Waveform debugging with the latest EDA tools, root-cause bugs independently. Nice to have: • Skills in scripting Perl/Python. • Knowledge in Industry Standard protocols such as AXI/OCP/APB. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Mobileye’s Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of Mobileye’s future AI and deep learning HW accelerators. This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver Mobileye’s EyeQ future chips, aimed to power the world’s first fully Autonomous Vehicle! What will your job look like: • Define, implement and enhance verification environments using UVM methodology. • Write and debug tests that combine UVM methodology and SW code. • Identify and write various types of coverage measures. • Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment. • Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs. All you need is: • BSc in electrical engineering, computer engineering, or computer science. • 8+ years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++). • System Verilog writing skills, preferably in OVM/UVM. • SW embedded experience, C/C++ skills. • TestPlan defining and Coverage-Driven Verification experience. • 3rd-party IPs integration testing experience. • Waveform debugging with the latest EDA tools, root-cause bugs independently. Nice to have: • Skills in scripting Perl/Python. • Knowledge in Industry Standard protocols such as AXI/OCP/APB. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Job Details: Job Description: About us: Intel Networking team delivers best in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you. Job Description: Verification of the microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking and equivalence checking algorithms on world class design IPs. Using the hardware architecture design and RTL implementation details, define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques, and create abstraction models for convergence on the design, Carve out the right boundaries for the design, create comprehensive Formal Verification test plans, track, verify, apply abstraction techniques and converge on complex designs to deliver a high quality design on schedule and articulate the ROI. analyze new methodologies, evaluates new tools and corroborate results. May work with vendors on resolving hard design and tool problems. Qualifications: Minimum Qualifications: 3+ years of experience in Formal Verification Preferred Qualifications: Experience with Jasper, SVA, Jasper Apps (connectivity, coverage) Experience with Perl/Python Experience with GHCP and AI tools Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Israel, Jerusalem, Israel, Petah-Tikva Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. *

Job Details: Job Description: Join us to help build the next generation of AI hardware solutions. You will be part of a highly skilled, agile team developing cutting-edge hardware for the AI domain, where we push the boundaries of what silicon can do for emerging AI workloads. With a startup-like culture, we move quickly and give engineers the opportunity to drive significant technical and business impact. We are intentional, fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more — and we look to our senior verification engineers to help steer that evolution. If you are energized by defining things that have never existed before, value rigorous thinking, and want real scope and short feedback loops - you'll feel right at home here. This is a senior, hands-on role with broad technical influence. You will own verification for meaningful parts of the chip — complex IPs and subsystems — building the environments that take them to sign-off, with room to influence the methodologies and working flows we adopt as a team. Responsibilities: • Own verification strategy and execution for complex AI acceleration IPs and subsystems, grounded in deep understanding of the algorithms and microarchitecture under test. • Build verification environments, define verification plans, and drive coverage closure to sign-off. • Provide technical leadership and mentorship, and help shape the team's verification methodology and working flows, reviewing plans, environments, and results along the way. • Champion and advance the team's use of AI tools across the verification flow, finding where they add real leverage and helping the team adopt them well • Collaborate closely with architects, designers, DFT, and emulation/bring-up teams to ensure correctness from block to system level. Qualifications: • B.Sc. in Electrical Engineering, Computer Engineering, or equivalent. • 6+ years of hands-on functional verification experience, with a strong record of taking complex IPs/subsystems to sign-off. • Deep expertise in SystemVerilog/UVM, constrained-random and coverage-driven verification, and verification methodology and planning. • Strong intuition for working with AI tools and real interest in using them to advance the verification flow. • Demonstrated technical leadership: owning verification strategy, mentoring engineers, and driving decisions across teams. Advantage • Verification experience with accelerators, datapath, or compute-heavy IPs for AI/ML • Strong familiarity with the broader development cycle, including design, DFT, and bring-up. Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. *