SoC Architect jobs in Israel

NXP Israel teams are working on multiple fronts of complex SoC and new technologies development, which are at the main core technologies of NXP MCU business. We are looking for a SoC Senior Architect to join the Israel SoC team in our Yokneam site and lead the different complex SoC architecture that the team is planned to develop. At this position, you will be responsible for: • Definition the next SoC’s architecture while working closely with the Marketing and System architect teams and with the RTL and DV teams. • In charge of the SoC Architecture spec. • Work closely with the other SW, Security, Analog, Digital architects and align the SoC architecture for their requirements. • Work closely with all SoC teams and make sure that the SoC development is aligned with the Architecture specification. • Collaborate with the documentation team to ensure they receive all necessary information as needed. The ideal candidate should have: • Minimum of 15 Years' experience. • Experience on SoC architecture for complex SoC. • Knowledge in RTL and DV. • Knowledge of different Video, Audio and bus (AHB, AXI) protocols. • Experience in working closely with different RTL, DV, SW, Marketing and other teams. • Excellent communication skills and ability to work in parallel with different teams worldwide. • Independent and team player. • Knowledge of ultra-low power design techniques. • Knowledge of Python programing languages is an advantage. • Education: BsC in Electrical engineering, MsC is an advantage. • Experience with hardware-software partitioning and understanding how to effectively divide system responsibilities between hardware and software components. • Possesses strong familiarity with ARM architecture, with expertise in Cortex-M platforms. • Have a solid understanding of security mechanisms. More information about NXP in Israel... #LI-6710

Speedata is modernizing analytics infrastructure with the first purpose-built ASIC processor, the Analytics Processing Unit (APU), for analytics and AI data workloads. Delivering up to 100x faster Apache Spark performance while cutting infrastructure TCO by 90%, the APU executes analytics operations directly in silicon with seamless integration and no code changes. Requirements BSc or higher degree in Electrical Engineering, Computer Science or Computer Engineering. Graduated with honors. 6+ years of experience as a system architect for large, high-end ASIC SoCs. Experience with multidisciplinary HW/SW systems. Team player with great communication skills. Advantages Deep understanding of datacenter systems Experience with architecture of processors, accelerators, high speed PCIe Responsibilities Definition and detailed hardware specifications of subsystems in the SoC Breaking down the sub-system architecture into microarchitectural blocks with the related firmware, and SW components. Understanding the system in which the SoC is integrated to and designing the SoC to perfectly fit into the datacenter system.

Description We’re a fast-moving, US-Israeli AI startup building next-generation infrastructure for the world’s most demanding AI workloads. Our mission is to accelerate the future of intelligence and make it ubiquitously accessible by delivering full stack custom AI servers optimized for large-scale inference and training. Backed by top-tier investors and led by industry veterans, we’re scaling rapidly. We seek forward-thinking engineers and operators who thrive in a collaborative environment and excel at solving complex challenges from first principles. If you want to build infrastructure that fundamentally changes what the world can accomplish with AI, come join us! About the position  We are looking for a seasoned SoC Architect to lead the design and integration of the management subsystem within Majestic’s AI acceleration platform. In this role, you will define and drive SoC-level architecture for control and management flows — integrating ARM cores, interconnects, high-speed IO, and system management interfaces. You’ll collaborate closely with peer architects, hardware, firmware, and system engineers to ensure a cohesive, high-performance design that bridges silicon and software seamlessly. This is a hands-on architecture role that combines technical depth, system-level thinking, and cross-domain leadership in a fast-moving startup environment. Responsibilities  • Define and own the management subsystem architecture for Majestic’s AI SoC. • Integrate ARM cores (CSS / Cortex-A) and associated subsystems for control, configuration, and monitoring. • Architect PCIe connectivity and high-bandwidth IO to ensure robust host and device communication. • Specify and integrate DDR/LPDDR interfaces and memory management structures. • Design peripheral and control interfaces, including SPI, I2C, UART, GPIO, and system control buses. • Develop scheduler and interrupt schemes, driver-facing control paths, and configuration frameworks. • Integrate and optimize debug and trace infrastructures (CoreSight, profilers, diagnostic tools). • Collaborate with RTL, verification, firmware, and board teams to ensure seamless hardware-software co-design. • Drive tradeoffs and decisions to achieve performance, power, and area targets across the SoC. Requirements • Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field. • 6+ years of experience in SoC architecture and design, with emphasis on management or control subsystems. • Proven experience with ARM core integration, PCIe, DDR/LPDDR, and peripheral interfaces (SPI, I2C, UART). • Strong understanding of SoC design flows, memory hierarchy, and interconnect fabrics. • Hands-on experience in control path design, driver interfaces, and interrupt management. • Solid communication and teamwork skills, with the ability to lead cross-functional architectural discussions. Preferred Qualifications  • Experience with AI/ML acceleration hardware or high-performance compute SoCs. • Knowledge of board-level integration and hardware-software co-validation. • Familiarity with silicon prototyping, emulation, or FPGA-based validation. • Expertise in low-power design and high-bandwidth interconnect architectures. • Deep experience with debug tools (CoreSight, trace analyzers, profilers) and performance instrumentation. We seek smart, curious, self-driven individuals who enjoy creative problem-solving and continuous learning. Even if you don't meet all requirements, we'd love to hear from you if you have the mindset to tackle complex challenges. Majestic Labs is an equal opportunity employer deeply committed to diversity of background and thought. If you are ready to dare greatly, learn from mistakes, engage in vigorous debates, and help create a step-function shift in human technical capability, we want to meet you!