Signal Integrity Engineer jobs in Israel

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact • The Signal Integrity Engineering Group (SIE) is a one-stop shop for all matters related to signal/power integrity (SI/PI), board design, and package design. The SIE team tailors a board and package design solution that fits every switch product according to the specific device SI/PI, performance, and cost targets and looks at each solution holistically. Looking at the holistic solution enables each of the SIE group members a unique opportunity to influence Marvell switch devices most profoundly and allows Marvell to supply our customers with the most adequate tailored end-to-end solution What You Can Expect • Be a part of developing creative power Integrity solutions for Marvell devices at package and system levels. • Evaluate designs to ensure they meet challenging electrical performance requirements. • Collaborate closely with layout engineers and IP teams to optimize power delivery network (PDN) performance. • Be a part of performing simulations, including new EDA tool evaluations, flow development, and scripting for efficiency improvements. • Be a part of developing creative signal integrity solutions for Marvell high speed device interfaces, develop and prove solution with electromagnetic simulation tool What We're Looking For • A third year + student learning towards BSc. In Electrical engineering &/or Physics in a known & recognized academic institute. • High interest in and perception of Electro-Magnetic fields, waves and distributed systems backed by high grades in the corelated courses 

Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-NR1

Description Senior Signal Integrity Engineer #LI-Hybrid About Us: DriveNets is at the forefront of developing innovative solutions in high-speed electronics. Our cutting-edge technology serves the next generation of networking and communications, including Ethernet routers and high-performance platforms for the most demanding applications. We are committed to solving complex challenges and pushing the boundaries of what's possible in signal and power integrity. The Role: We are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os. Responsibilities: • Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces. • Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths. • Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues. • Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices. • Perform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis. • Utilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs. • Work closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process. • Develop behavioural models based on measured signal integrity data to inform future design and simulation work. • Conduct pre- and post-layout simulations and measurements for high-speed signal interfaces. Requirements • Bachelor's or Master’s degree in Electrical/Electronics Engineering with 10+ years of relevant experience. • Strong understanding of electromagnetic (EM) concepts and transmission line theory. • Extensive experience in signal integrity analysis for high-speed serial interfaces, including Ethernet, PCIe, and DDR5. • Proficiency in using EDA tools like Ansys SIWAVE, HFSS, or similar. • Hands-on expertise in time-domain and frequency-domain analysis, jitter, loss, and eye-diagram analysis. • Strong background in HSPICE simulations and model development. • Experience with PCB layout techniques for high-speed designs. • Excellent communication skills and the ability to work effectively in a collaborative team environment. Advantages: • Experience with advanced simulation tools and techniques. • Experience with high-speed interfaces such as 112Gbps PAM4 Ethernet, PCIe Gen5, and DDR5. • In-depth knowledge of high-speed PCB design and layout principles. • Familiarity with power integrity and power noise simulations.

Mobileye is looking for a Signal Integrity Engineer to join AV group and develop of the next generation of Autonomous Driving products. Mobileye is a leading innovator in the automotive industry, dedicated to delivering cutting-edge technology and solutions. We are committed to advancing automotive safety, efficiency, and connectivity through our state-of-the-art ECUs. We are seeking a highly skilled Signal and Power Integrity Simulation Engineer to join our hardware engineering team. In this role, you will be responsible for analyzing and optimizing signal and power integrity in complex electronic systems. You will work closely with design and validation teams to ensure high-performance designs that meet industry standards. What will your job look like: • Conduct signal integrity (SI) simulations for automotive electronic systems, analyzing and optimizing high-speed interfaces, such as LPDDR4/5, PCIe Gen4/5, A/C/D-PHY, Multi Giga-Bit Ethernet . • Conduct Power integrity (PI) simulations, optimizing target impedance and AC coupling in power delivery networks to ensure optimal performance and reliability. • Collaborate with Silicon & Hardware design engineers, IP providers, Electrical and System Validation teams, EDA tools vendors, and product managers to address SI/PI issues and provide actionable design recommendations. • Engage in joint simulation and measurement efforts with the Electrical Validation team to facilitate comprehensive validation of designs. Perform root cause analysis on signal and power integrity failures and propose effective corrective actions. • Generate comprehensive reports and presentations to communicate simulation findings and design strategies to technical and non-technical stakeholders. All you need is: • Bachelor or master's degree in electrical engineering. • At least 5 years of experience as an Integrity Engineer. • Proven experience in signal and power integrity analysis • Proficiency in simulation tools such as HyperLynx, ANSYS, ADS or equivalent, including 2.5D/3D extraction. • Strong knowledge of transmission line theory, electromagnetic principles, and PCB design best practices. • Experience with lab measurement equipment for SI/PI validation (e.g., oscilloscopes, TDR) - Advantage • Excellent analytical and problem-solving skills, with a keen attention to detail. • Strong communication skills and the ability to work collaboratively in a dynamic team environment. Mobileye changes the way we drive, from preventing accidents to semi and fully autonomous vehicles. If you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!

Job Details: Job Description: Intel Central Engineering Group (CEG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. CEG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers. You will be exposed to High-Speed I/O protocols such as PCIeGen6-7, DDR5-6, and PAM4 Ethernet 224Gb, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines. We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization. Most of the team's engineers have 10+ years of experience, and we are looking for a highly skilled multidisciplinary engineer with proven experience in Signal Integrity engineering to lead the hardware design of our next division projects' challenges and be part of Ethernet networking's accelerated growth. In this position, as a signal integrity engineer, you will be responsible for modeling channel elements in 3D and 2D EM simulation tools for pre- and post-layout stages of package and platform design for PCIe, Ethernet, and memory interfaces. You are expected to have a thorough understanding of RF circuits and electromagnetic wave propagation; the role includes learning the specifications of each interface and the required design limitations that should be verified. You will be expected to lead all signal integrity activities related to multiple projects for various high-speed and low-speed interfaces utilizing traditional and automated tools. You will work closely with silicon design teams and Hard IP vendors and will be responsible for the model's correlation based on cross-section and electrical measurements at the post-manufacturing stage and modeling manufacturing variation impact on the channels. You will be responsible for running the sign-off simulation flows for various designs, providing feedback to the design teams, and being hands-on in the lab for experiments when required. You would also be responsible for identifying/qualifying new AI-based automation techniques and solutions and providing technical leadership to working groups/task forces through debugging and reviews. Qualifications: Required Skills and Experience • B.Sc./M.Sc. Electrical Engineer with over 7 years of relevant experience in Signal Integrity • Proven design experience in the semiconductor ASIC development industry is a MUST • Proven planning and design flow buildup • Proven experience with PCB technology and layout techniques (Analog and Digital) including stack-up, routing, and advance SI/PI consideration • Proven hands-on experience with EDA tools: HFSS, CST, ADS, Simbeor, or equivalent • Knowledge of CAD tools: Cadence Allegro or Mentor Expedition, or equivalent • Proven experience with modeling and simulation one of the Ethernet, PCIe, DDR interfaces • Familiar with layout technics • Working experience with AI-based tools • Lab hands-on experience in high-speed, low-speed, and clocks circuitry signals measurement such as high-end Oscilloscopes, VNA, TDR, BERT's, etc. • Excellent debugging skills, ability to analyze problems, diagnose the root cause and apply corrective actions • Ability to work as a team player and contribute in a cross-functional product team on a daily basis • Strong verbal and written communication skills in English for interacting with design, evaluation and production engineers; customers; technical marketing engineers; and program managers Job Type: Experienced Hire Shift: Shift 1 (Israel) Primary Location: Israel, Petah-Tikva Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. *