FPGA Design Engineer jobs in Israel

Sentrycs’ mission is to enable a more drone-empowered future! How? With our integrated counter-drone solution, we support law enforcement agencies, prisons, critical infrastructures, airports, mass events, convoys, militarizes, and more, by providing them with 24/7 drone protection. With our fully autonomous, easily portable, and UTM-ready technology, detecting and mitigating unauthorized drones has never been simpler. We work to keep society protected from unauthorized eyes in the skies so you can remain operational and ensure business continuity on the ground. Let’s build a drone-empowered future together! As a Senior FPGA & System Architecture Engineer, you will drive the end-to-end hardware architecture and implementation of next-generation wireless communications systems. You will lead the design and integration of high-throughput physical layer pipelines across AMD Xilinx RFSoC platforms, high-speed PCIe interfaces, and host GPU acceleration environments—bridging algorithmic signal processing with production-grade SoC hardware infrastructure. In this role, you will: Architect & Design: Own the full-chip system architecture on AMD Xilinx RFSoC platforms. DSP RTL Implementation: Partner directly with Algorithm Engineers to translate floating-point MATLAB/C++ models into fixed-point, resource-optimized, and bit-exact SystemVerilog RTL. Host & GPU Acceleration Interfacing: Architect and implement high-bandwidth PCIe subsystems connecting the RFSoC to host CPU and GPU accelerators, ensuring deterministic data streaming, low-latency DMA transfers, and reliable link initialization during system boot. Verification & Hardware Bring-Up: Lead bit-accurate simulation, hardware emulation, and lab bring-up using Vivado, logic analyzers, and RF test equipment to profile throughput, validate timing closure, and eliminate real-time system bottlenecks. Requirements The ideal FPGA engineer who we are looking for should have SoC & FPGA Mastery: Proven, hands-on experience architecting and delivering production designs on AMD Xilinx Zynq UltraScale+ RFSoC or MPSoC platforms. HDL & RTL Implementation: Expert-level proficiency in synthesizable SystemVerilog or Verilog, with a strong focus on high-speed pipelining, timing closure in congested designs. Host Interfacing & Data Movement: Demonstrated experience implementing high-bandwidth PCIe subsystems (Gen3/Gen4) and high-throughput DMA engines (e.g., XDMA/QDMA), including link training/enumeration bring-up, boot sequencing, and backpressure management. Nice to Have RF-DC Subsystem Integration: Hands-on experience configuring and integrating AMD Xilinx RF-Data Converters (multi-gigasample ADCs/DACs) and their associated digital down/up-conversion chains. DSP Hardware Design: Strong foundation in implementing fixed-point wireless communications algorithms in FPGA fabric (e.g., polyphase filter banks, multi-rate DDC/DUC, FFT/IFFT, channel estimation, correlation) with efficient DSP slice mapping and dynamic range management. Driver & Software Alignment: Familiarity with Linux kernel drivers, user-space drivers (VFIO/UIO, DPDK), or embedded software running on the ARM Processing System to coordinate hardware-software control planes.

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk. Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets. We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus. We are currently seeking a Senior FPGA Engineer to join one of our trading teams. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design. Responsibilities: • Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up • Research and evaluate a variety of cutting-edge FPGA hardware and technologies • Propose creative solutions to overcome FPGA/hardware limitations • Liaise directly with software and other design teams • Conduct lab debugging and characterization of new hardware Candidate Requirements: • Bachelor's degree or higher, Computer/Electrical Engineering graduated with honors from a leading university, with 3+ years of experience within the field; (Master's degree or higher also counts for experience) • Solid Hardware Engineering experience, especially with FPGA • Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production • Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation • Strong skills in RTL logic design and verification; 2+ years of experience writing Verilog or SystemVerilog • Strong knowledge of FPGAs fabric • Experience in FPGA design flow including synthesis, place & route, static timing analysis is required • Knowledge of Ethernet and Gigabit high speed serial interfaces • Strong working knowledge of either XILINX or ALTERA FPGA design flow • Experience with Python verification framework is a plus • Excellent research and data gathering skills For more information about DRW's processing activities and our use of job applicants' data, please view our Privacy Notice at https://drw.com/privacy-notice. California residents, please review the California Privacy Notice for information about certain legal rights at https://drw.com/california-privacy-notice. #LI-BL1

Job Title Senior FPGA Design Engineer Job Description We are looking for an experienced FPGA Design Engineer who will play a pivotal role in developing , designing and optimizing FPGA solutions for our cutting-edge projects. Your expertise will drive innovation and excellence in digital design as part of the detection team in CT\AMI. Your role : • Develop FPGA logic using VHDL / Verilog • Design and implement high-speed data paths and interfaces such as DDR, PCIe, Ethernet. • Perform simulation, verification, timing closure, and debugging • Integrate FPGA with soft processors (such as MicroBlaze / Nios), sensors, ADCs/DACs, and other system components • Support system bring-up, lab validation, and debugging at both board and system level • Collaborate closely with hardware, firmware, software, and system teams • Support and participate in architecture discussions and design reviews • Read and understand board schematics to support integration and troubleshooting • Perform lab and system-level testing after component changes or design updates • Document FPGA design, interfaces, and implementation details • You're the right fit if: • Bachelor's degree in Electrical Engineering • 4+ years of hands-on FPGA design experience, in a multidisciplinary industry. • Strong experience in digital logic design and debugging • Strong knowledge of VHDL / Verilog • Experience with Xilinx tools, especially Vivado • Knowledge and experience with high-speed serial interfaces (such as: Ethernet, DDR) and protocols like AXI. • Familiarity with high-speed interfaces and memory systems • Ability to read and understand system schematics • Experience with lab debugging and validation • Ability to document design work clearly and support structured release processes Advantages • Experience with UVM or other verification methodologies • Background in imaging systems or signal processing • Experience in medical devices or other regulated industries How we work together We believe that we are better together than apart. For our office-based teams, this means working in-person at least 3 days per week. Onsite roles require full-time presence in the company’s facilities. Field roles are most effectively done outside of the company’s main facilities, generally at the customers’ or suppliers’ locations. About Philips We are a health technology company. We built our entire company around the belief that every human matters, and we won't stop until everybody everywhere has access to the quality healthcare that we all deserve. Do the work of your life to help the lives of others. • Learn more about our business. • Discover our rich and exciting history. • Learn more about our purpose. If you’re interested in this role and have many, but not all, of the experiences needed, we encourage you to apply. You may still be the right candidate for this or other opportunities at Philips. Learn more about our culture of impact with care here. Compensation & benefits Doing meaningful work should come with fair, transparent rewards. The base monthly salary range for this grade R&D roles is [21,515]– [ 35,858] ILS . We determine pay within the range using objective factors, like the skills the role requires, your relevant experience and the responsibility you'll have in this role, alongside internal equity and local market considerations. This role is eligible for a bonus, with your rewards linked to KPIs & company results. We'll share the full approach and additional benefits with you during the interview process, so you can make a clear, informed decision. #LI-EU #LI-OFFICE

Description Quantum Machines is a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field. We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team. This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems. Responsibilities • Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication. • Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal. • Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration. • Drive FPGA bring-up, debugging, and validation at both lab and system levels. • Participate in system architecture definition and cross-team design decisions. Requirements Must-Haves • 3+ years of experience in FPGA design and digital system development. • Strong proficiency in Verilog/SystemVerilog RTL design. • Hands-on experience with Xilinx FPGA families (UltraScale+, Zynq, or Versal). • Experience implementing and debugging high-speed interfaces (PCIe, Ethernet, JESD, or similar). • Solid understanding of FPGA development flows, including synthesis, place & route, and timing closure. • Experience with lab debugging tools (e.g., ILA/ChipScope, oscilloscopes, logic analyzers). • Experience with simulation and verification methodologies (RTL and gate-level). • Strong problem-solving skills and attention to detail. • B.Sc. or higher in Electrical Engineering, Computer Engineering, or equivalent. • Strong communication skills and ability to collaborate across teams. Advantages • Experience with Versal architecture, including NoC design and integration. • Background in ASIC design or verification. • Familiarity with FPGA backend flows and static timing analysis (STA). • Scripting experience (Python, TCL, Makefile) and/or C/C++ knowledge.