Chip Design Verification Engineer jobs in Israel

Description At Altair Semiconductor, we develop advanced wireless and IoT solutions that connect millions of devices worldwide. Our engineers own significant parts of each project, becoming true experts in their fields. You'll work directly with your team from initial concept through final delivery, seeing the real impact of your work. We maintain a flat organization where ideas flow freely between engineers and leadership. Our experienced team members actively mentor newer colleagues, creating an environment where everyone can learn and grow. We're proud that our employees choose to build long-term careers with us. Many of our team members have been with the company for years, contributing to a stable, knowledgeable workplace where collaboration comes naturally. We understand the importance of work-life balance and want to make it easy for you to have time for everything you want to do. What you will be doing As a SOC Verification Engineer, you'll develop complex verification environments for Altair’s advanced 5G IoT products. Working directly with design,software and architecture teams, you'll lead verification efforts from block-level to full chip integration. Your work ensures the quality and reliability of innovative systems that power millions of connected devices worldwide. On a typical day On a typical day, you might start by analyzing test reports from overnight regressions, collaborate with designers to debug a complex protocol issue, develop one of our various DV enviorments and/or infrastructre, mentor a team member on verification methodology, and participate in a technical review of a new test environment. Responsibilities • Create and implement comprehensive verification strategies for complex SoC designs • Develop sophisticated test environments using industry-standard methodologies • Lead verification planning from test definition through coverage closure • Debug complex integration issues alongside design and software teams • Build and maintain reusable verification components • Develop and upgrade our evergrowing verification infrastructure • Guide junior team members and share technical expertise Requirements • BSc in Electrical Engineering • 5+ years of hands-on verification experience with complex designs • Strong expertise in System Verilog and/or Specman Technical Background: • Deep understanding of system-level verification flows • Experience with coverage-driven verification methodologies • Knowledge of high-level system constraints Working Style: • Proven ability to collaborate across teams • Strong problem-solving and analytical skills • Self-motivated, independent, and able to drive projects to completion • Comfortable working in new domains and subject areas • Capable of quickly understanding new documentation and extracting key insights • Shows initiative and takes ownership

Description We’re a fast-moving, US-Israeli AI startup building next-generation infrastructure for the world’s most demanding AI workloads. Our mission is to accelerate the future of intelligence and make it ubiquitously accessible by delivering full stack custom AI servers optimized for large-scale inference and training. Backed by top-tier investors and led by industry veterans, we’re scaling rapidly. We seek forward-thinking engineers and operators who thrive in a collaborative environment and excel at solving complex challenges from first principles. If you want to build infrastructure that fundamentally changes what the world can accomplish with AI, come join us! About the position  We are looking for an experienced, highly skilled and motivated Pre-Silicon Verification Engineer to join our core team. In this role, you will be responsible for chip-level and performance verification of one of our custom ASICs. Responsibilities  • Work with our engineers and partners to help verify our ASICs • Work with our architecture team to understand our architecture and to design end-to-end test flows and methodologies to verify real-world performance scenarios • Manage vendors and/or contractors as necessary Requirements • Bachelor’s or Master’s in Computer Science, Computer Engineering, or a related field from a recognized university • Expert-level experience with simulation tools & flows (VCS, Verdi, NCSim and the like) • Scripting experience in Perl and/or Python • 5+ years experience using constrained random & functional coverage based verification methodologies on large design blocks • 5+ years hands-on coding of UVM verification environments • C/C++ expertise is a plus • Excellent communication skills and a strong track record of cross-functional collaboration Preferred Qualifications  • Experience with and understanding of common LLMs • Experience with AI or other large-scale datacenter-grade ASICs • Experience doing performance verification of compute or networking ASICs We seek smart, curious, self-driven individuals who enjoy creative problem-solving and continuous learning. Even if you don't meet all requirements, we'd love to hear from you if you have the mindset to tackle complex challenges. Majestic Labs is an equal opportunity employer deeply committed to diversity of background and thought. If you are ready to dare greatly, learn from mistakes, engage in vigorous debates, and help create a step-function shift in human technical capability, we want to meet you!